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Merge pull request #136 from facchinm/improve_fast_pin_io
Avoid fast pins IO on RTOS based boards
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1 file changed
+7
-3
@@ -58,6 +58,11 @@ typedef BitOrder BusIOBitOrder;
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// typedef uint32_t BusIO_PortMask;
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//#define BUSIO_USE_FAST_PINIO
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#elif defined(__MBED__) || defined(__ZEPHYR__)
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// Boards based on RTOS cores like mbed or Zephyr are not going to expose the
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// low level registers needed for fast pin manipulation
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#undef BUSIO_USE_FAST_PINIO
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#elif defined(ARDUINO_ARCH_XMC)
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#undef BUSIO_USE_FAST_PINIO
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@@ -73,9 +78,8 @@ typedef uint32_t BusIO_PortMask;
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#define BUSIO_USE_FAST_PINIO
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#elif (defined(__arm__) || defined(ARDUINO_FEATHER52)) && \
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!defined(ARDUINO_ARCH_MBED) && !defined(ARDUINO_ARCH_RP2040) && \
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!defined(ARDUINO_SILABS) && !defined(ARDUINO_UNOR4_MINIMA) && \
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!defined(ARDUINO_UNOR4_WIFI)
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!defined(ARDUINO_ARCH_RP2040) && !defined(ARDUINO_SILABS) && \
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!defined(ARDUINO_UNOR4_MINIMA) && !defined(ARDUINO_UNOR4_WIFI)
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typedef volatile uint32_t BusIO_PortReg;
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typedef uint32_t BusIO_PortMask;
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#if !defined(__ASR6501__) && !defined(__ASR6502__)
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