[ESP32-C61] Add initial support for ESP32-C61

This commit is contained in:
TD-er
2025-11-14 00:25:14 +01:00
parent dc1f72c097
commit 80cd9a0f1d
29 changed files with 358 additions and 35 deletions
+10 -2
View File
@@ -22,6 +22,8 @@
# define SOC_RX0 44 # define SOC_RX0 44
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX0 17 # define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX0 12 # define SOC_RX0 12
# elif CONFIG_IDF_TARGET_ESP32C3 # elif CONFIG_IDF_TARGET_ESP32C3
@@ -38,6 +40,8 @@
# define SOC_TX0 43 # define SOC_TX0 43
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX0 16 # define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX0 11 # define SOC_TX0 11
# elif CONFIG_IDF_TARGET_ESP32C3 # elif CONFIG_IDF_TARGET_ESP32C3
@@ -58,7 +62,7 @@
# define SOC_RX1 13 # define SOC_RX1 13
# elif CONFIG_IDF_TARGET_ESP32S2 # elif CONFIG_IDF_TARGET_ESP32S2
# define SOC_RX1 18 # define SOC_RX1 18
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61
# define SOC_RX1 4 # define SOC_RX1 4
# elif CONFIG_IDF_TARGET_ESP32S3 # elif CONFIG_IDF_TARGET_ESP32S3
# define SOC_RX1 15 # define SOC_RX1 15
@@ -74,7 +78,7 @@
# define SOC_TX1 15 # define SOC_TX1 15
# elif CONFIG_IDF_TARGET_ESP32S2 # elif CONFIG_IDF_TARGET_ESP32S2
# define SOC_TX1 17 # define SOC_TX1 17
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61
# define SOC_TX1 5 # define SOC_TX1 5
# elif CONFIG_IDF_TARGET_ESP32S3 # elif CONFIG_IDF_TARGET_ESP32S3
# define SOC_TX1 16 # define SOC_TX1 16
@@ -97,6 +101,8 @@
# define SOC_RX2 19 # define SOC_RX2 19
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX2 6 # define SOC_RX2 6
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_RX2 6
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX2 6 # define SOC_RX2 6
# else // if CONFIG_IDF_TARGET_ESP32 # else // if CONFIG_IDF_TARGET_ESP32
@@ -116,6 +122,8 @@
# define SOC_TX2 20 # define SOC_TX2 20
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX2 7 # define SOC_TX2 7
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_TX2 7
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX2 7 # define SOC_TX2 7
# else // if CONFIG_IDF_TARGET_ESP32 # else // if CONFIG_IDF_TARGET_ESP32
@@ -35,12 +35,12 @@ static_assert(false, "Implement processor architecture");
#ifdef ESP32 #ifdef ESP32
/* /*
#if CONFIG_IDF_TARGET_ESP32C6 || // support USB via HWCDC using JTAG interface #if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || // support USB via HWCDC using JTAG interface
CONFIG_IDF_TARGET_ESP32C3 || // support USB via HWCDC using JTAG interface CONFIG_IDF_TARGET_ESP32C3 || // support USB via HWCDC using JTAG interface
CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC
CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC
*/ */
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 # if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
// #if CONFIG_TINYUSB_CDC_ENABLED // This define is not recognized here so use USE_USB_CDC_CONSOLE // #if CONFIG_TINYUSB_CDC_ENABLED // This define is not recognized here so use USE_USB_CDC_CONSOLE
# ifdef USE_USB_CDC_CONSOLE # ifdef USE_USB_CDC_CONSOLE
+5 -5
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@@ -155,7 +155,7 @@ IO_REG_TYPE directRead(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 #if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
return (GPIO.in.val >> pin) & 0x1; return (GPIO.in.val >> pin) & 0x1;
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4
if ( pin < 32 ) if ( pin < 32 )
return (GPIO.in.val >> pin) & 0x1; return (GPIO.in.val >> pin) & 0x1;
else if ( pin < SOC_GPIO_PIN_COUNT ) else if ( pin < SOC_GPIO_PIN_COUNT )
@@ -175,7 +175,7 @@ void directWriteLow(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 #if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.out_w1tc.val = ((uint32_t)1 << pin); GPIO.out_w1tc.val = ((uint32_t)1 << pin);
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4
if ( pin < 32 ) if ( pin < 32 )
GPIO.out_w1tc.val = ((uint32_t)1 << pin); GPIO.out_w1tc.val = ((uint32_t)1 << pin);
else if ( pin < SOC_GPIO_PIN_COUNT ) else if ( pin < SOC_GPIO_PIN_COUNT )
@@ -194,7 +194,7 @@ void directWriteHigh(IO_REG_TYPE pin)
{ {
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 #if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.out_w1ts.val = ((uint32_t)1 << pin); GPIO.out_w1ts.val = ((uint32_t)1 << pin);
#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32P4 #elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4
if ( pin < 32 ) if ( pin < 32 )
GPIO.out_w1ts.val = ((uint32_t)1 << pin); GPIO.out_w1ts.val = ((uint32_t)1 << pin);
else if ( pin < SOC_GPIO_PIN_COUNT ) else if ( pin < SOC_GPIO_PIN_COUNT )
@@ -226,7 +226,7 @@ void directModeInput(IO_REG_TYPE pin)
} }
#endif #endif
// Input // Input
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32P4 #if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4
if ( pin < 32 ) if ( pin < 32 )
GPIO.enable_w1tc.val = ((uint32_t)1 << pin); GPIO.enable_w1tc.val = ((uint32_t)1 << pin);
else else
@@ -259,7 +259,7 @@ void directModeOutput(IO_REG_TYPE pin)
} }
#endif #endif
// Output // Output
#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32P4 #if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32P4
if ( pin < 32 ) if ( pin < 32 )
GPIO.enable_w1ts.val = ((uint32_t)1 << pin); GPIO.enable_w1ts.val = ((uint32_t)1 << pin);
else // already validated to pins <= 33 else // already validated to pins <= 33
+2
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@@ -91,6 +91,8 @@ struct ImprovWiFiParamsStruct {
"ESP32-C5" "ESP32-C5"
#elif defined(CONFIG_IDF_TARGET_ESP32C6) #elif defined(CONFIG_IDF_TARGET_ESP32C6)
"ESP32-C6" "ESP32-C6"
#elif defined(CONFIG_IDF_TARGET_ESP32C61)
"ESP32-C61"
#elif defined(CONFIG_IDF_TARGET_ESP32H2) #elif defined(CONFIG_IDF_TARGET_ESP32H2)
"ESP32-H2" "ESP32-H2"
#elif defined(ESP8266) #elif defined(ESP8266)
+2 -2
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@@ -12,7 +12,7 @@ enum NeoBusChannel
NeoBusChannel_0, NeoBusChannel_0,
NeoBusChannel_1, NeoBusChannel_1,
#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
NeoBusChannel_2, NeoBusChannel_2,
@@ -35,7 +35,7 @@ enum NeoBusChannel
NeoBusChannel_7, NeoBusChannel_7,
#endif // !defined(CONFIG_IDF_TARGET_ESP32S2) #endif // !defined(CONFIG_IDF_TARGET_ESP32S2)
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) #endif
#endif // ARDUINO_ARCH_ESP32 #endif // ARDUINO_ARCH_ESP32
@@ -29,7 +29,7 @@ License along with NeoPixel. If not, see
#include <Arduino.h> #include <Arduino.h>
#if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR < 5 && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C2) #if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR < 5 && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61) && !defined(CONFIG_IDF_TARGET_ESP32C2)
#include "NeoSettings.h" #include "NeoSettings.h"
#include "NeoBusChannel.h" #include "NeoBusChannel.h"
#include "NeoEsp32RmtMethod.h" #include "NeoEsp32RmtMethod.h"
@@ -29,7 +29,7 @@ License along with NeoPixel. If not, see
#pragma once #pragma once
#if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR < 5 && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C2) #if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR < 5 && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61) && !defined(CONFIG_IDF_TARGET_ESP32C2)
/* General Reference documentation for the APIs used in this implementation /* General Reference documentation for the APIs used in this implementation
LOW LEVEL: (what is actually used) LOW LEVEL: (what is actually used)
@@ -454,7 +454,7 @@ public:
const static rmt_channel_t RmtChannelNumber = RMT_CHANNEL_3; const static rmt_channel_t RmtChannelNumber = RMT_CHANNEL_3;
}; };
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
class NeoEsp32RmtChannel4 class NeoEsp32RmtChannel4
{ {
@@ -308,7 +308,7 @@ public:
rmt_channel_handle_t RmtChannelNumber = NULL; rmt_channel_handle_t RmtChannelNumber = NULL;
}; };
#if !defined(CONFIG_IDF_TARGET_ESP32C6) // C6 only 2 RMT channels ?? #if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61) // C6 only 2 RMT channels ??
class NeoEsp32RmtChannel2 class NeoEsp32RmtChannel2
{ {
public: public:
@@ -326,7 +326,7 @@ public:
rmt_channel_handle_t RmtChannelNumber = NULL; rmt_channel_handle_t RmtChannelNumber = NULL;
}; };
#endif // !defined(CONFIG_IDF_TARGET_ESP32C6) #endif // !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
class NeoEsp32RmtChannel4 class NeoEsp32RmtChannel4
{ {
@@ -582,7 +582,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedTx1812, NeoEsp32RmtChannel1> NeoEs
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811Method; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811Method;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xMethod;
@@ -689,7 +689,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedTx1812, NeoEsp32RmtChannel
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsInvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsInvertedMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811InvertedMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811InvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xInvertedMethod; typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xInvertedMethod;
@@ -763,13 +763,13 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChanne
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6) #endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) #if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)
// Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT // Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT
// will switch to use RMT as the default method // will switch to use RMT as the default method
// The ESP32S2 & ESP32C3 will always defualt to RMT // The ESP32S2 & ESP32C3 will always defualt to RMT
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) #if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)
// RMT channel 1 method is the default method for Esp32S2 & Esp32C3 // RMT channel 1 method is the default method for Esp32S2 & Esp32C3
typedef NeoEsp32Rmt1Ws2812xMethod NeoWs2813Method; typedef NeoEsp32Rmt1Ws2812xMethod NeoWs2813Method;
@@ -30,7 +30,7 @@ License along with NeoPixel. If not, see
#if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR >= 5 #if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR >= 5
#if (defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)) && !defined(HSPI_HOST) #if (defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32C61)) && !defined(HSPI_HOST)
// HSPI_HOST depreciated in C3 // HSPI_HOST depreciated in C3
#define HSPI_HOST SPI2_HOST #define HSPI_HOST SPI2_HOST
#endif #endif
@@ -29,7 +29,7 @@ License along with NeoPixel. If not, see
#include <Arduino.h> #include <Arduino.h>
// ESP32C3 I2S is not supported yet // ESP32C3 I2S is not supported yet
#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32P4) #if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61) && !defined(CONFIG_IDF_TARGET_ESP32P4)
#if !defined(ARDUINO_ARCH_ESP8266) #if !defined(ARDUINO_ARCH_ESP8266)
#include "soc/gpio_periph.h" #include "soc/gpio_periph.h"
#endif #endif
@@ -29,7 +29,7 @@ License along with NeoPixel. If not, see
#if defined(ARDUINO_ARCH_ESP8266) || defined(ARDUINO_ARCH_ESP32) #if defined(ARDUINO_ARCH_ESP8266) || defined(ARDUINO_ARCH_ESP32)
// ESP32C3 I2S is not supported yet // ESP32C3 I2S is not supported yet
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) #if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32C61)
#if defined(ARDUINO_ARCH_ESP8266) #if defined(ARDUINO_ARCH_ESP8266)
#include <eagle_soc.h> #include <eagle_soc.h>
+1 -1
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@@ -29,7 +29,7 @@ extra_configs =
platformio_esp32c3_envs.ini platformio_esp32c3_envs.ini
platformio_esp32c5_envs.ini platformio_esp32c5_envs.ini
platformio_esp32c6_envs.ini platformio_esp32c6_envs.ini
; platformio_esp32c61_envs.ini platformio_esp32c61_envs.ini
platformio_esp32p4_envs.ini platformio_esp32p4_envs.ini
+5 -3
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@@ -166,9 +166,11 @@ extra_scripts = ${esp82xx_common.extra_scripts}
[core_esp32_IDF5_5_1__3_3_3_LittleFS] [core_esp32_IDF5_5_1__3_3_3_LittleFS]
;platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF55_gcc15 ;platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF55_gcc15
;platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/0410-1232-5.5/framework-arduinoespressif32-release_v5.5-2f303469.tar.xz ;platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/0410-1232-5.5/framework-arduinoespressif32-release_v5.5-2f303469.tar.xz
platform = https://github.com/Jason2866/platform-espressif32.git#23aed73e4e570d3b6608c15677fea01d6a722d94
;platform_packages = ;platform = https://github.com/Jason2866/platform-espressif32.git#23aed73e4e570d3b6608c15677fea01d6a722d94
platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/0711-1952-5.5/framework-arduinoespressif32-release_v5.5-deb3f45f.tar.xz ;platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/1311-2008-5.5_orig/framework-arduinoespressif32-release_v5.5_orig-276436da.tar.xz
platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF55
platform_packages =
custom_remove_include = true custom_remove_include = true
build_flags = -DESP32_STAGE build_flags = -DESP32_STAGE
+5
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@@ -4,11 +4,16 @@ build_flags = ${esp32_base_idf5_5.build_flags}
-DFEATURE_ARDUINO_OTA=1 -DFEATURE_ARDUINO_OTA=1
-DUSE_LITTLEFS -DUSE_LITTLEFS
-DESP32C61 -DESP32C61
-DDISABLE_NEOPIXEL_PLUGINS=1
extra_scripts = ${esp32_base_idf5_5.extra_scripts} extra_scripts = ${esp32_base_idf5_5.extra_scripts}
build_unflags = ${esp32_base_idf5_5.build_unflags} build_unflags = ${esp32_base_idf5_5.build_unflags}
-fexceptions -fexceptions
board_build.filesystem = littlefs board_build.filesystem = littlefs
lib_ignore = ${esp32_base_idf5_5.lib_ignore} lib_ignore = ${esp32_base_idf5_5.lib_ignore}
NeoPixelBus
Adafruit NeoPixel
NeoPixelBus_wrapper
Adafruit NeoMatrix via NeoPixelBus
board = esp32c61cdc board = esp32c61cdc
@@ -477,7 +477,7 @@ bool ESPEasyWiFi_t::connectSTA()
WiFiEventData.warnedNoValidWiFiSettings = false; WiFiEventData.warnedNoValidWiFiSettings = false;
*/ */
setSTA(true); WiFi_pre_STA_setup();
# if defined(ESP8266) # if defined(ESP8266)
wifi_station_set_hostname(NetworkCreateRFCCompliantHostname().c_str()); wifi_station_set_hostname(NetworkCreateRFCCompliantHostname().c_str());
@@ -30,6 +30,9 @@ bool WiFi_pre_setup() {
bool WiFi_pre_STA_setup() { bool WiFi_pre_STA_setup() {
if (!doSetSTA(true)) { return false; } if (!doSetSTA(true)) { return false; }
// FIXME TD-er: Should ESP8266 first disable autoconnect/autoreconnect?
// On ESP32 this does clear the last used credentials, so it will be able to accept different credentials to connect to.
// Assign to 2 separate bools to make sure both are executed. // Assign to 2 separate bools to make sure both are executed.
const bool autoConnect = WiFi.setAutoConnect(true); const bool autoConnect = WiFi.setAutoConnect(true);
const bool autoReconnect = WiFi.setAutoReconnect(true); const bool autoReconnect = WiFi.setAutoReconnect(true);
+1 -1
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@@ -119,7 +119,7 @@
#ifndef CONFIG_SOC_WIFI_HE_SUPPORT #ifndef CONFIG_SOC_WIFI_HE_SUPPORT
#if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 #if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || CONFIG_IDF_TARGET_ESP32C61
#define CONFIG_SOC_WIFI_HE_SUPPORT 1 #define CONFIG_SOC_WIFI_HE_SUPPORT 1
#else #else
#define CONFIG_SOC_WIFI_HE_SUPPORT 0 #define CONFIG_SOC_WIFI_HE_SUPPORT 0
+1 -1
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@@ -71,7 +71,7 @@
#ifdef ESP32 #ifdef ESP32
/* /*
#if CONFIG_IDF_TARGET_ESP32C6 || // support USB via HWCDC using JTAG interface #if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61 || // support USB via HWCDC using JTAG interface
CONFIG_IDF_TARGET_ESP32C3 || // support USB via HWCDC using JTAG interface CONFIG_IDF_TARGET_ESP32C3 || // support USB via HWCDC using JTAG interface
CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC
CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC
+1 -1
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@@ -866,7 +866,7 @@ bool SettingsStruct_tmpl<N_TASKS>::getPinBootStateIndex(
index_high = gpio_pin - maxStates; index_high = gpio_pin - maxStates;
# if defined(ESP32_CLASSIC) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C5) || defined(ESP32C6) # if defined(ESP32_CLASSIC) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C5) || defined(ESP32C6) || defined(ESP32C61)
// These can all store in the PinBootStates_ESP32 array // These can all store in the PinBootStates_ESP32 array
return (index_high < maxStatesesp32); return (index_high < maxStatesesp32);
+11
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@@ -16,6 +16,10 @@
#include <ESPEasySerialPort.h> #include <ESPEasySerialPort.h>
#ifdef ESP32
#include <esp32-hal-periman.h>
#endif
EspEasy_Console_t::EspEasy_Console_t() : EspEasy_Console_t::EspEasy_Console_t() :
_mainSerial(LOG_TO_SERIAL) _mainSerial(LOG_TO_SERIAL)
@@ -236,6 +240,13 @@ void EspEasy_Console_t::begin(uint32_t baudrate)
if (_fallbackSerial._serial != nullptr) { if (_fallbackSerial._serial != nullptr) {
_fallbackSerial._serial->begin(baudrate); _fallbackSerial._serial->begin(baudrate);
#ifdef ESP32
// Need to have this string as C-string, not F-string
perimanSetPinBusExtraType(SOC_RX0, "Console");
perimanSetPinBusExtraType(SOC_TX0, "Console");
#endif
addLog(LOG_LEVEL_INFO, F("ESPEasy console fallback enabled")); addLog(LOG_LEVEL_INFO, F("ESPEasy console fallback enabled"));
} }
#endif // if USES_ESPEASY_CONSOLE_FALLBACK_PORT #endif // if USES_ESPEASY_CONSOLE_FALLBACK_PORT
+28
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@@ -456,6 +456,8 @@ int getCPU_MaxFreqMHz()
return 160; return 160;
#elif CONFIG_IDF_TARGET_ESP32C6 #elif CONFIG_IDF_TARGET_ESP32C6
return 160; return 160;
#elif CONFIG_IDF_TARGET_ESP32C61
return 120;
#elif CONFIG_IDF_TARGET_ESP32C5 #elif CONFIG_IDF_TARGET_ESP32C5
return 240; return 240;
#elif CONFIG_IDF_TARGET_ESP32H2 #elif CONFIG_IDF_TARGET_ESP32H2
@@ -734,6 +736,32 @@ void readBootCause() {
case JTAG_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<24, jtag reset CPU*/ case JTAG_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<24, jtag reset CPU*/
} }
#elif defined(ESP32C61)
switch (rtc_get_reset_reason(0)) {
case NO_MEAN : break;
case POWERON_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<1, Vbat power on reset*/
case RTC_SW_SYS_RESET : lastBootCause = BOOT_CAUSE_SOFT_RESTART; break; /**<3, Software reset digital core*/
case DEEPSLEEP_RESET : lastBootCause = BOOT_CAUSE_DEEP_SLEEP; break; /**<5, Deep Sleep reset digital core*/
case RTC_PWR_GLITCH_RESET : lastBootCause = BOOT_CAUSE_POWER_UNSTABLE; break;
case CPU_LOCKUP_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break;
case TG0WDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<7, Timer Group0 Watch dog reset digital core*/
case TG1WDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<8, Timer Group1 Watch dog reset digital core*/
case RTCWDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<9, RTC Watch dog Reset digital core*/
case TG0WDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<11, Time Group0 reset CPU*/
case RTC_SW_CPU_RESET : lastBootCause = BOOT_CAUSE_SOFT_RESTART; break; /**<12, Software reset CPU*/
case RTCWDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<13, RTC Watch dog Reset CPU*/
case RTCWDT_BROWN_OUT_RESET : lastBootCause = BOOT_CAUSE_POWER_UNSTABLE; break; /**<15, Reset when the vdd voltage is not stable*/
case RTCWDT_RTC_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<16, RTC Watch dog reset digital core and rtc module*/
case TG1WDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<17, Time Group1 reset CPU*/
case SUPER_WDT_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<18, super watchdog reset digital core and rtc module*/
case EFUSE_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<20, efuse reset digital core*/
case USB_UART_CHIP_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<21, usb uart reset digital core */
case USB_JTAG_CHIP_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<22, usb jtag reset digital core */
case JTAG_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<24, jtag reset CPU*/
}
#elif defined(ESP32P4) #elif defined(ESP32P4)
switch (rtc_get_reset_reason(0)) { switch (rtc_get_reset_reason(0)) {
case NO_MEAN : break; case NO_MEAN : break;
+1 -1
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@@ -18,7 +18,7 @@
# include <driver/adc.h> # include <driver/adc.h>
# endif // if ESP_IDF_VERSION_MAJOR >= 5 # endif // if ESP_IDF_VERSION_MAJOR >= 5
# if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 # if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32C61
/** /**
* On ESP32C3, ADC2 is no longer supported, due to its HW limitation. * On ESP32C3, ADC2 is no longer supported, due to its HW limitation.
* Search for errata on espressif website for more details. * Search for errata on espressif website for more details.
+145
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@@ -0,0 +1,145 @@
#include "../Helpers/Hardware_GPIO.h"
#ifdef ESP32C61
# include <driver/gpio.h>
# include "../Helpers/Hardware_device_info.h"
// ********************************************************************************
// Get info of a specific GPIO pin
// ********************************************************************************
bool getGpioInfo(int gpio, int& pinnr, bool& input, bool& output, bool& warning) {
pinnr = -1; // ESP32 does not label the pins, they just use the GPIO number.
input = GPIO_IS_VALID_GPIO(gpio);
output = GPIO_IS_VALID_OUTPUT_GPIO(gpio);
warning = isBootStrapPin(gpio);
if (!(GPIO_IS_VALID_GPIO(gpio))) { return false; }
if (gpio == 27) {
// By default VDD_SPI is the power supply pin for embedded flash or external flash. It can only be used as GPIO
// only when the chip is connected to an external flash, and this flash is powered by an external power supply
input = false;
output = false;
warning = true;
}
if (isFlashInterfacePin_ESPEasy(gpio)) {
// Connected to the integrated SPI flash.
input = false;
output = false;
warning = true;
}
if ((gpio == PIN_USB_D_MIN) || (gpio == PIN_USB_D_PLUS)) {
// USB OTG and USB Serial/JTAG function. USB signal is a differential
// signal transmitted over a pair of D+ and D- wires.
warning = true;
}
return (input || output);
}
bool isBootModePin(int gpio)
{
return gpio == 9;
}
bool isBootStrapPin(int gpio)
{
// See: https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf
// Chapter 3 - Boot Configurations
if (gpio == 8) {
// Strapping pin which must be high during flashing
// ROM message printing
return true;
}
if (gpio == 9) {
// Strapping pin to force download mode (like GPIO-0 on ESP8266/ESP32-classic)
// internal Weak pull-up, must be pulled down to enter download boot mode.
return true;
}
// Ignoring SDIO stapping pins as this will not be used in typical use cases where ESPEasy is used.
/*
if (gpio == 4 || gpio == 5) {
// SDIO Sampling and Driving Clock Edge
// MTMS = GPIO-4
// MTDI = Gpio-5
return true;
}
*/
if (gpio == 15) {
// JTAG signal source
return true;
}
return false;
}
bool getGpioPullResistor(int gpio, bool& hasPullUp, bool& hasPullDown) {
hasPullDown = false;
hasPullUp = false;
if (validGpio(gpio)) {
hasPullUp = true;
hasPullDown = true;
}
return true;
}
bool validGpio(int gpio) {
if (!GPIO_IS_VALID_GPIO(gpio)) { return false; }
int pinnr;
bool input;
bool output;
bool warning;
return getGpioInfo(gpio, pinnr, input, output, warning);
}
// Get ADC related info for a given GPIO pin
// @param gpio_pin GPIO pin number
// @param adc Number of ADC unit (0 == Hall effect)
// @param ch Channel number on ADC unit
// @param t index of touch pad ID
bool getADC_gpio_info(int gpio_pin, int& adc, int& ch, int& t)
{
adc = -1;
ch = -1;
t = -1;
if ((gpio_pin >= 0) && (gpio_pin <= 6)) {
adc = 1;
ch = gpio_pin;
return true;
}
return false;
}
#if SOC_TOUCH_SENSOR_SUPPORTED
int touchPinToGpio(int touch_pin)
{
// No touch pin support
return -1;
}
#endif
#if SOC_DAC_SUPPORTED
// Get DAC related info for a given GPIO pin
// @param gpio_pin GPIO pin number
// @param dac Number of DAC unit
bool getDAC_gpio_info(int gpio_pin, int& dac)
{
// ESP32-C3, ESP32-S3, ESP32-C2, ESP32-C6 and ESP32-H2 don't have a DAC onboard
return false;
}
#endif
#endif // ifdef ESP32C61
+10
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@@ -86,6 +86,8 @@ static_assert(false, "Implement processor architecture");
# define SOC_RX0 44 # define SOC_RX0 44
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX0 17 # define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX0 12 # define SOC_RX0 12
# elif CONFIG_IDF_TARGET_ESP32C3 # elif CONFIG_IDF_TARGET_ESP32C3
@@ -104,6 +106,8 @@ static_assert(false, "Implement processor architecture");
# define SOC_TX0 43 # define SOC_TX0 43
# elif CONFIG_IDF_TARGET_ESP32C6 # elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX0 16 # define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C61
# define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C5 # elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX0 11 # define SOC_TX0 11
# elif CONFIG_IDF_TARGET_ESP32C3 # elif CONFIG_IDF_TARGET_ESP32C3
@@ -126,6 +130,9 @@ static_assert(false, "Implement processor architecture");
#ifdef ESP32C6 #ifdef ESP32C6
#define PIN_USB_D_MIN 12 #define PIN_USB_D_MIN 12
#endif #endif
#ifdef ESP32C61
#define PIN_USB_D_MIN 12 // TODO TD-er: Check
#endif
#ifdef ESP32C5 #ifdef ESP32C5
#define PIN_USB_D_MIN 13 #define PIN_USB_D_MIN 13
#endif #endif
@@ -145,6 +152,9 @@ static_assert(false, "Implement processor architecture");
#ifdef ESP32C6 #ifdef ESP32C6
#define PIN_USB_D_PLUS 13 #define PIN_USB_D_PLUS 13
#endif #endif
#ifdef ESP32C61
#define PIN_USB_D_PLUS 13 // TODO TD-er: Check
#endif
#ifdef ESP32C5 #ifdef ESP32C5
#define PIN_USB_D_PLUS 14 #define PIN_USB_D_PLUS 14
#endif #endif
+2 -2
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@@ -223,7 +223,7 @@ String getChipFeaturesString() {
} }
bool getFlashChipOPI_wired() { bool getFlashChipOPI_wired() {
# if defined(ESP32_CLASSIC) || defined(ESP32C2) # if defined(ESP32_CLASSIC) || defined(ESP32C2) || defined(ESP32C61)
return false; return false;
# else // ifdef ESP32_CLASSIC # else // ifdef ESP32_CLASSIC
@@ -247,7 +247,7 @@ uint32_t getFlashChipSpeed() {
// for which patches have been submitted and somehow they managed to merge it completely wrong. // for which patches have been submitted and somehow they managed to merge it completely wrong.
return ESP.getFlashChipSpeed(); return ESP.getFlashChipSpeed();
# else // if ESP_IDF_STILL_NEEDS_SPI_REGISTERS_FIXED # else // if ESP_IDF_STILL_NEEDS_SPI_REGISTERS_FIXED
#ifdef ESP32P4 #if defined(ESP32P4) || defined(ESP32C61)
// TODO TD-er: Implement // TODO TD-er: Implement
// return 80000000; // return 80000000;
return ESP.getFlashChipSpeed(); return ESP.getFlashChipSpeed();
@@ -3,6 +3,84 @@
#ifdef ESP32C61 #ifdef ESP32C61
# include <soc/soc.h>
# include <soc/efuse_reg.h>
# include <soc/spi_reg.h>
# include <soc/spi_pins.h>
# include <soc/rtc.h>
# include <esp_chip_info.h>
# include <bootloader_common.h>
bool isFlashInterfacePin_ESPEasy(int gpio) {
// FIXME TD-er: Must know whether we have internal or external flash
// For chip variants with an in-package flash, this pin can not be used.
// FIXME TD-er: No idea where these pins come from. Disabled for now.
// See: https://github.com/letscontrolit/ESPEasy/issues/5220
/*
if ((gpio == 10) || (gpio == 11)) {
return true;
}
*/
// For chip variants without an in-package flash, this pin can not be used.
// if (gpio == 14)
// return true;
// GPIO-27: Flash voltage selector
// GPIO-24 ... 30: Connected to internal flash (might be available when using external flash???)
switch (gpio) {
#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 4, 0)
case SPI_IOMUX_PIN_NUM_CS:
case SPI_IOMUX_PIN_NUM_CLK:
case SPI_IOMUX_PIN_NUM_MOSI:
case SPI_IOMUX_PIN_NUM_MISO:
case SPI_IOMUX_PIN_NUM_WP:
case SPI_IOMUX_PIN_NUM_HD:
#else
case MSPI_IOMUX_PIN_NUM_HD:
case MSPI_IOMUX_PIN_NUM_WP:
case MSPI_IOMUX_PIN_NUM_CS0:
case MSPI_IOMUX_PIN_NUM_CLK:
case MSPI_IOMUX_PIN_NUM_MOSI:
case MSPI_IOMUX_PIN_NUM_MISO:
#endif
return true;
}
return false;
// return (gpio) >= 24 && (gpio) <= 30 && gpio != 27;
}
bool flashVddPinCanBeUsedAsGPIO()
{
return false;
}
int32_t getEmbeddedFlashSize()
{
return 8; // TODO TD-er: Must implement
// See: framework-arduinoespressif32\tools\esp32-arduino-libs\esp32c61\include\soc\esp32c61\include\soc\efuse_reg.h
}
int32_t getEmbeddedPSRAMSize()
{
// Doesn't have PSRAM
return 0;
}
# ifndef isPSRAMInterfacePin
bool isPSRAMInterfacePin(int gpio) {
return false;
}
# endif // ifndef isPSRAMInterfacePin
const __FlashStringHelper* getChipModel(uint32_t chip_model, uint32_t chip_revision, uint32_t pkg_version, bool single_core) const __FlashStringHelper* getChipModel(uint32_t chip_model, uint32_t chip_revision, uint32_t pkg_version, bool single_core)
{ {
if (20 == chip_model) { // ESP32-C61 if (20 == chip_model) { // ESP32-C61
+4
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@@ -212,6 +212,10 @@ const __FlashStringHelper* getConflictingUse_flashstr(int gpio, PinSelectPurpose
return F("Flash Vdd"); return F("Flash Vdd");
} }
#elif defined(ESP32C61)
// TODO TD-er: Must check if C61 has conflicts here
#elif defined(ESP32C2) || defined(ESP32C3) #elif defined(ESP32C2) || defined(ESP32C3)
if (gpio == 11) { if (gpio == 11) {
@@ -23,6 +23,8 @@
#include <esp32c5/rom/rtc.h> #include <esp32c5/rom/rtc.h>
#elif defined(ESP32C6) #elif defined(ESP32C6)
#include <esp32c6/rom/rtc.h> #include <esp32c6/rom/rtc.h>
#elif defined(ESP32C61)
#include <esp32c61/rom/rtc.h>
#elif defined(ESP32P4) #elif defined(ESP32P4)
#include <esp32p4/rom/rtc.h> #include <esp32p4/rom/rtc.h>
# elif defined(ESP32_CLASSIC) # elif defined(ESP32_CLASSIC)
@@ -233,6 +235,31 @@ const __FlashStringHelper * getResetReasonString_f(uint8_t icore, bool& isDEEPSL
case JTAG_RESET : return F("jtag reset CPU"); case JTAG_RESET : return F("jtag reset CPU");
} }
#elif defined(ESP32C61)
// See tools\sdk\esp32\include\esp_rom\include\esp32c61\rom\rtc.h
switch (rtc_get_reset_reason(icore)) {
case NO_MEAN : break;
case POWERON_RESET : return F("Vbat power on reset");
case RTC_SW_SYS_RESET : return F("Software reset digital core (hp system)");
case DEEPSLEEP_RESET : isDEEPSLEEP_RESET = true; break;
//case DEEPSLEEP_RESET : return F("Deep Sleep reset digital core (hp system)");
case TG0WDT_SYS_RESET : return F("Timer Group0 Watch dog reset digital core (hp system)");
case TG1WDT_SYS_RESET : return F("Timer Group1 Watch dog reset digital core (hp system)");
case RTCWDT_SYS_RESET : return F("RTC Watch dog Reset digital core (hp system)");
case TG0WDT_CPU_RESET : return F("Time Group0 reset CPU");
case RTC_SW_CPU_RESET : return F("Software reset CPU");
case RTCWDT_CPU_RESET : return F("RTC Watch dog Reset CPU");
case RTCWDT_BROWN_OUT_RESET : return F("Reset when the vdd voltage is not stable");
case RTCWDT_RTC_RESET : return F("RTC Watch dog reset digital core and rtc module");
case TG1WDT_CPU_RESET : return F("Time Group1 reset CPU");
case SUPER_WDT_RESET : return F("super watchdog reset digital core and rtc module");
case EFUSE_RESET : return F("efuse reset digital core (hp system)");
case USB_UART_CHIP_RESET : return F("usb uart reset digital core (hp system)");
case USB_JTAG_CHIP_RESET : return F("usb jtag reset digital core (hp system)");
case JTAG_RESET : return F("jtag reset CPU");
}
#elif defined(ESP32P4) #elif defined(ESP32P4)
// See tools\sdk\esp32\include\esp_rom\include\esp32p4\rom\rtc.h // See tools\sdk\esp32\include\esp_rom\include\esp32p4\rom\rtc.h
+1 -1
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@@ -21,7 +21,7 @@ def get_max_bin_size(env_name, file_suffix):
if "4M316k" in env_name or "_ESP32_4M2M" in env_name: if "4M316k" in env_name or "_ESP32_4M2M" in env_name:
# ESP32 with 1800k of sketch space. # ESP32 with 1800k of sketch space.
max_bin_size = 1900544 max_bin_size = 1900544
if "_ESP32_" in env_name or "_ESP32c5_" in env_name or "_ESP32c6_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name: if "_ESP32_" in env_name or "_ESP32c5_" in env_name or "_ESP32c6_" in env_name or "_ESP32c61_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name:
if "_8M1M" in env_name: if "_8M1M" in env_name:
# ESP32 with 3520k of sketch space. # ESP32 with 3520k of sketch space.
max_bin_size = 3604480 max_bin_size = 3604480