Michel2/OpenFlops-W1D
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Code Issues Releases Wiki Activity

Fix PU3

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This commit is contained in:
SukkoPera committed 2019-07-25 19:21:08 +02:00
1 parent 98a55bdd81
commit cdbb4c50ab
3 files changed
+309 -298
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OpenFlops.pro
+24 -13
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@@ -1,4 +1,4 @@
update=gio 25 lug 2019 00:58:30 CEST
update=gio 25 lug 2019 08:50:17 CEST
version=1
last_client=kicad
[general]
@@ -57,7 +57,7 @@ OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
@@ -187,13 +187,13 @@ Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
Enabled=0
[pcbnew/Layer.F.Adhes]
Enabled=1
Enabled=0
[pcbnew/Layer.B.Paste]
Enabled=1
Enabled=0
[pcbnew/Layer.F.Paste]
Enabled=1
Enabled=0
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
@@ -203,13 +203,13 @@ Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
Enabled=0
[pcbnew/Layer.Cmts.User]
Enabled=1
Enabled=0
[pcbnew/Layer.Eco1.User]
Enabled=1
Enabled=0
[pcbnew/Layer.Eco2.User]
Enabled=1
Enabled=0
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
@@ -219,15 +219,15 @@ Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=1
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
Clearance=0.25
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
@@ -236,3 +236,14 @@ uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.25
TrackWidth=0.75
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25