From ca8fcc7fe3552565a3163f1dcca6b54b92ca4906 Mon Sep 17 00:00:00 2001 From: alias pillar1989 Date: Tue, 28 Apr 2026 11:09:23 +0800 Subject: [PATCH] Add MCP2515 8MHz 83.3kbps bitrate support Add the missing MCP_8MHz_83k3BPS timing macros and wire CAN_83K3BPS into the MCP_8MHz bitrate switch. Fixes #79. --- src/mcp2515_can.cpp | 6 ++++++ src/mcp2515_can_dfs.h | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/src/mcp2515_can.cpp b/src/mcp2515_can.cpp index 8a565be..9bfbc46 100644 --- a/src/mcp2515_can.cpp +++ b/src/mcp2515_can.cpp @@ -678,6 +678,12 @@ byte mcp2515_can::mcp2515_configRate(const byte canSpeed, const byte clock) { cfg1 = MCP_8MHz_80kBPS_CFG1; cfg2 = MCP_8MHz_80kBPS_CFG2; cfg3 = MCP_8MHz_80kBPS_CFG3; + break; + + case (CAN_83K3BPS) : + cfg1 = MCP_8MHz_83k3BPS_CFG1; + cfg2 = MCP_8MHz_83k3BPS_CFG2; + cfg3 = MCP_8MHz_83k3BPS_CFG3; break; case (CAN_95K2BPS): diff --git a/src/mcp2515_can_dfs.h b/src/mcp2515_can_dfs.h index 89afe0b..1f5e6b3 100644 --- a/src/mcp2515_can_dfs.h +++ b/src/mcp2515_can_dfs.h @@ -456,6 +456,10 @@ #define MCP_8MHz_80kBPS_CFG2 (0xbf) #define MCP_8MHz_80kBPS_CFG3 (0x07) +#define MCP_8MHz_83k3BPS_CFG1 (0x01) +#define MCP_8MHz_83k3BPS_CFG2 (0xBE) +#define MCP_8MHz_83k3BPS_CFG3 (0x07) + #define MCP_8MHz_50kBPS_CFG1 (0x03) #define MCP_8MHz_50kBPS_CFG2 (0xb4) #define MCP_8MHz_50kBPS_CFG3 (0x06)