From 4f7706d1d167bc44261ac358bf5e7df95c91fed8 Mon Sep 17 00:00:00 2001
From: Theo Arends <11044339+arendst@users.noreply.github.com>
Date: Sat, 3 Oct 2026 17:33:06 +0200
Subject: [PATCH] Correct way of ICACHE_RAM_ATTR usage

---
 lib/default/TasmotaWire/src/core_esp8266_si2c.cpp | 2 +-
 lib/default/TasmotaWire/src/twi_class.h           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/default/TasmotaWire/src/core_esp8266_si2c.cpp b/lib/default/TasmotaWire/src/core_esp8266_si2c.cpp
index f14b80d67..a0ecb5001 100644
--- a/lib/default/TasmotaWire/src/core_esp8266_si2c.cpp
+++ b/lib/default/TasmotaWire/src/core_esp8266_si2c.cpp
@@ -112,7 +112,7 @@ void Twi::init(unsigned char sda, unsigned char scl) {
   twi_setClockStretchLimit(150000L); // default value is 150 mS
 }
 
-void Twi::busywait(unsigned int v) {
+void ICACHE_RAM_ATTR Twi::busywait(unsigned int v) {
   unsigned int i;
   for (i = 0; i < v; i++) {  // loop time is 5 machine cycles: 31.25ns @ 160MHz, 62.5ns @ 80MHz
     asm("nop"); // minimum element to keep GCC from optimizing this function out.
diff --git a/lib/default/TasmotaWire/src/twi_class.h b/lib/default/TasmotaWire/src/twi_class.h
index 8fe7eadc8..ac28eb198 100644
--- a/lib/default/TasmotaWire/src/twi_class.h
+++ b/lib/default/TasmotaWire/src/twi_class.h
@@ -12,7 +12,7 @@ private:
     uint32_t twi_clockStretchLimit = 150000;
 
     // Internal use functions
-    void ICACHE_RAM_ATTR busywait(unsigned int v);
+    void busywait(unsigned int v);
     bool write_start(void);
     bool write_stop(void);
     bool write_bit(bool bit);