From 227805b95e65f1180fa32d265fc1bb70233c9d29 Mon Sep 17 00:00:00 2001 From: olikraus Date: Mon, 6 Mar 2017 19:46:12 +0100 Subject: [PATCH] 2.14.3 --- examples/full_buffer/FPS/FPS.ino | 2 + .../full_buffer/GraphicsTest/GraphicsTest.ino | 2 + .../full_buffer/HelloWorld/HelloWorld.ino | 2 + examples/full_buffer/PrintUTF8/PrintUTF8.ino | 2 + .../SelectionList/SelectionList.ino | 2 + examples/full_buffer/U8g2Logo/U8g2Logo.ino | 2 + .../page_buffer/ContrastTest/ContrastTest.ino | 2 + .../page_buffer/DirectAccess/DirectAccess.ino | 2 + examples/page_buffer/ExtUTF8/ExtUTF8.ino | 2 + examples/page_buffer/FPS/FPS.ino | 2 + examples/page_buffer/FlipMode/FlipMode.ino | 2 + .../page_buffer/GraphicsTest/GraphicsTest.ino | 2 + .../page_buffer/HelloWorld/HelloWorld.ino | 2 + .../PrintHelloWorld/PrintHelloWorld.ino | 2 + examples/page_buffer/PrintUTF8/PrintUTF8.ino | 2 + .../ScrollingText/ScrollingText.ino | 2 + .../SelectionList/SelectionList.ino | 2 + examples/page_buffer/U8g2Logo/U8g2Logo.ino | 2 + examples/u8x8/FlipMode/FlipMode.ino | 2 + examples/u8x8/GraphicsTest/GraphicsTest.ino | 2 + examples/u8x8/HelloWorld/HelloWorld.ino | 8 +- examples/u8x8/MessageBox/MessageBox.ino | 2 + library.properties | 2 +- src/U8g2lib.h | 72 +++ src/U8x8lib.h | 24 + src/clib/u8g2.h | 6 + src/clib/u8g2_d_memory.c | 18 + src/clib/u8g2_d_setup.c | 28 + src/clib/u8x8.h | 3 + src/clib/u8x8_d_ssd1329.c | 297 ++++++++++ src/clib/u8x8_d_st75256.c | 510 ++++++++++++++++++ src/clib/u8x8_d_st7588.c | 4 +- src/clib/u8x8_d_uc1617.c | 241 +++++++++ 33 files changed, 1250 insertions(+), 5 deletions(-) create mode 100644 src/clib/u8x8_d_ssd1329.c create mode 100644 src/clib/u8x8_d_st75256.c create mode 100644 src/clib/u8x8_d_uc1617.c diff --git a/examples/full_buffer/FPS/FPS.ino b/examples/full_buffer/FPS/FPS.ino index ca06ba8b..35974fd5 100644 --- a/examples/full_buffer/FPS/FPS.ino +++ b/examples/full_buffer/FPS/FPS.ino @@ -194,6 +194,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/GraphicsTest/GraphicsTest.ino b/examples/full_buffer/GraphicsTest/GraphicsTest.ino index 90759f4d..75a8de49 100644 --- a/examples/full_buffer/GraphicsTest/GraphicsTest.ino +++ b/examples/full_buffer/GraphicsTest/GraphicsTest.ino @@ -78,6 +78,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/HelloWorld/HelloWorld.ino b/examples/full_buffer/HelloWorld/HelloWorld.ino index 3264819b..9a9ef289 100644 --- a/examples/full_buffer/HelloWorld/HelloWorld.ino +++ b/examples/full_buffer/HelloWorld/HelloWorld.ino @@ -77,6 +77,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/PrintUTF8/PrintUTF8.ino b/examples/full_buffer/PrintUTF8/PrintUTF8.ino index e7a87533..f1163aab 100644 --- a/examples/full_buffer/PrintUTF8/PrintUTF8.ino +++ b/examples/full_buffer/PrintUTF8/PrintUTF8.ino @@ -80,6 +80,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/SelectionList/SelectionList.ino b/examples/full_buffer/SelectionList/SelectionList.ino index 3fcbbebc..879ad667 100644 --- a/examples/full_buffer/SelectionList/SelectionList.ino +++ b/examples/full_buffer/SelectionList/SelectionList.ino @@ -77,6 +77,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/U8g2Logo/U8g2Logo.ino b/examples/full_buffer/U8g2Logo/U8g2Logo.ino index fecbf315..de47a0b6 100644 --- a/examples/full_buffer/U8g2Logo/U8g2Logo.ino +++ b/examples/full_buffer/U8g2Logo/U8g2Logo.ino @@ -78,6 +78,8 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ContrastTest/ContrastTest.ino b/examples/page_buffer/ContrastTest/ContrastTest.ino index 78dd5e85..43babda7 100644 --- a/examples/page_buffer/ContrastTest/ContrastTest.ino +++ b/examples/page_buffer/ContrastTest/ContrastTest.ino @@ -79,6 +79,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/DirectAccess/DirectAccess.ino b/examples/page_buffer/DirectAccess/DirectAccess.ino index 874f03a2..183cd305 100644 --- a/examples/page_buffer/DirectAccess/DirectAccess.ino +++ b/examples/page_buffer/DirectAccess/DirectAccess.ino @@ -83,6 +83,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ExtUTF8/ExtUTF8.ino b/examples/page_buffer/ExtUTF8/ExtUTF8.ino index f97d6edb..58c5ba55 100644 --- a/examples/page_buffer/ExtUTF8/ExtUTF8.ino +++ b/examples/page_buffer/ExtUTF8/ExtUTF8.ino @@ -79,6 +79,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/FPS/FPS.ino b/examples/page_buffer/FPS/FPS.ino index b3d46b87..5e329a96 100644 --- a/examples/page_buffer/FPS/FPS.ino +++ b/examples/page_buffer/FPS/FPS.ino @@ -229,6 +229,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/FlipMode/FlipMode.ino b/examples/page_buffer/FlipMode/FlipMode.ino index 59f2f307..5e1b3990 100644 --- a/examples/page_buffer/FlipMode/FlipMode.ino +++ b/examples/page_buffer/FlipMode/FlipMode.ino @@ -74,6 +74,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/GraphicsTest/GraphicsTest.ino b/examples/page_buffer/GraphicsTest/GraphicsTest.ino index 7e316ff2..da8bdc8a 100644 --- a/examples/page_buffer/GraphicsTest/GraphicsTest.ino +++ b/examples/page_buffer/GraphicsTest/GraphicsTest.ino @@ -79,6 +79,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/HelloWorld/HelloWorld.ino b/examples/page_buffer/HelloWorld/HelloWorld.ino index 678c8781..8f601e23 100644 --- a/examples/page_buffer/HelloWorld/HelloWorld.ino +++ b/examples/page_buffer/HelloWorld/HelloWorld.ino @@ -79,6 +79,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino b/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino index e49c602d..4f7b9e4a 100644 --- a/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino +++ b/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino @@ -80,6 +80,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/PrintUTF8/PrintUTF8.ino b/examples/page_buffer/PrintUTF8/PrintUTF8.ino index 81bb854e..fa1f8435 100644 --- a/examples/page_buffer/PrintUTF8/PrintUTF8.ino +++ b/examples/page_buffer/PrintUTF8/PrintUTF8.ino @@ -80,6 +80,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ScrollingText/ScrollingText.ino b/examples/page_buffer/ScrollingText/ScrollingText.ino index 32d7417c..73f1702f 100644 --- a/examples/page_buffer/ScrollingText/ScrollingText.ino +++ b/examples/page_buffer/ScrollingText/ScrollingText.ino @@ -80,6 +80,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/SelectionList/SelectionList.ino b/examples/page_buffer/SelectionList/SelectionList.ino index 0f05a4a7..d1b9c970 100644 --- a/examples/page_buffer/SelectionList/SelectionList.ino +++ b/examples/page_buffer/SelectionList/SelectionList.ino @@ -69,6 +69,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/U8g2Logo/U8g2Logo.ino b/examples/page_buffer/U8g2Logo/U8g2Logo.ino index f92aac9c..a8610f54 100644 --- a/examples/page_buffer/U8g2Logo/U8g2Logo.ino +++ b/examples/page_buffer/U8g2Logo/U8g2Logo.ino @@ -78,6 +78,8 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1309_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/u8x8/FlipMode/FlipMode.ino b/examples/u8x8/FlipMode/FlipMode.ino index 7294c96b..9c101bc6 100644 --- a/examples/u8x8/FlipMode/FlipMode.ino +++ b/examples/u8x8/FlipMode/FlipMode.ino @@ -72,6 +72,8 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_KS0108_128X64 u8x8(8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! diff --git a/examples/u8x8/GraphicsTest/GraphicsTest.ino b/examples/u8x8/GraphicsTest/GraphicsTest.ino index 95ffb8f8..7c84aa2e 100644 --- a/examples/u8x8/GraphicsTest/GraphicsTest.ino +++ b/examples/u8x8/GraphicsTest/GraphicsTest.ino @@ -74,6 +74,8 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_KS0108_128X64 u8x8(8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! diff --git a/examples/u8x8/HelloWorld/HelloWorld.ino b/examples/u8x8/HelloWorld/HelloWorld.ino index 4b411fc7..9f608485 100644 --- a/examples/u8x8/HelloWorld/HelloWorld.ino +++ b/examples/u8x8/HelloWorld/HelloWorld.ino @@ -71,6 +71,8 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_KS0108_128X64 u8x8(8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! @@ -119,6 +121,8 @@ // End of constructor list + + void setup(void) { /* U8g2 Project: SSD1306 Test Board */ @@ -131,7 +135,6 @@ void setup(void) //pinMode(16, OUTPUT); //digitalWrite(16, 0); - u8x8.setI2CAddress(0x07e); u8x8.begin(); u8x8.setPowerSave(0); @@ -142,8 +145,9 @@ void loop(void) { u8x8.setFont(u8x8_font_chroma48medium8_r); u8x8.drawString(0,1,"Hello World!"); + for(;;); u8x8.refreshDisplay(); // for SSD1606/7 - delay(2000); + //delay(2000); /* delay(1000); diff --git a/examples/u8x8/MessageBox/MessageBox.ino b/examples/u8x8/MessageBox/MessageBox.ino index 560d4485..2d4b2b44 100644 --- a/examples/u8x8/MessageBox/MessageBox.ino +++ b/examples/u8x8/MessageBox/MessageBox.ino @@ -71,6 +71,8 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); +//U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_KS0108_128X64 u8x8(8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18, /*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/ U8X8_PIN_NONE); // Set R/W to low! diff --git a/library.properties b/library.properties index d87be4f6..47b61080 100644 --- a/library.properties +++ b/library.properties @@ -1,5 +1,5 @@ name=U8g2 -version=2.14.2 +version=2.14.3 author=oliver maintainer=oliver sentence=Monochrome LCD, OLED and eInk Library. Display controller: SSD1305, SSD1306, SSD1309, SSD1322, SSD1325, SSD1327, SSD1606, SSD1607, SH1106, T6963, RA8835, LC7981, PCD8544, PCF8812, UC1604, UC1608, UC1610, UC1611, UC1701, ST7565, ST7567, NT7534, IST3020, ST7920, LD7032, KS0108. Interfaces: I2C, SPI, Parallel. diff --git a/src/U8g2lib.h b/src/U8g2lib.h index 2c2210b0..6b598d73 100644 --- a/src/U8g2lib.h +++ b/src/U8g2lib.h @@ -1710,6 +1710,78 @@ class U8G2_SSD1327_SEEED_96X96_F_2ND_HW_I2C : public U8G2 { u8x8_SetPin_HW_I2C(getU8x8(), reset); } }; +class U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_1_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_1_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_2_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_2(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_6800 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1329_128X96_NONAME_F_8080 : public U8G2 { + public: U8G2_SSD1329_128X96_NONAME_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1329_128x96_noname_f(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; class U8G2_LD7032_60X32_1_4W_SW_SPI : public U8G2 { public: U8G2_LD7032_60X32_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { u8g2_Setup_ld7032_60x32_1(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); diff --git a/src/U8x8lib.h b/src/U8x8lib.h index 245cbc84..f0a12df3 100644 --- a/src/U8x8lib.h +++ b/src/U8x8lib.h @@ -718,6 +718,30 @@ class U8X8_SSD1327_SEEED_96X96_2ND_HW_I2C : public U8X8 { u8x8_SetPin_HW_I2C(getU8x8(), reset); } }; +class U8X8_SSD1329_128X96_NONAME_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8X8_SSD1329_128X96_NONAME_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8X8_SSD1329_128X96_NONAME_6800 : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1329_128X96_NONAME_8080 : public U8X8 { + public: U8X8_SSD1329_128X96_NONAME_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; class U8X8_LD7032_60X32_4W_SW_SPI : public U8X8 { public: U8X8_LD7032_60X32_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { u8x8_Setup(getU8x8(), u8x8_d_ld7032_60x32, u8x8_cad_011, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); diff --git a/src/clib/u8g2.h b/src/clib/u8g2.h index 50afc234..c77222b0 100644 --- a/src/clib/u8g2.h +++ b/src/clib/u8g2.h @@ -426,6 +426,9 @@ uint8_t *u8g2_m_ssd1325_16_f(uint8_t *page_cnt); uint8_t *u8g2_m_ssd1327_12_1(uint8_t *page_cnt); uint8_t *u8g2_m_ssd1327_12_2(uint8_t *page_cnt); uint8_t *u8g2_m_ssd1327_12_f(uint8_t *page_cnt); +uint8_t *u8g2_m_ssd1329_16_1(uint8_t *page_cnt); +uint8_t *u8g2_m_ssd1329_16_2(uint8_t *page_cnt); +uint8_t *u8g2_m_ssd1329_16_f(uint8_t *page_cnt); uint8_t *u8g2_m_ld7032_8_1(uint8_t *page_cnt); uint8_t *u8g2_m_ld7032_8_2(uint8_t *page_cnt); uint8_t *u8g2_m_ld7032_8_f(uint8_t *page_cnt); @@ -584,6 +587,9 @@ void u8g2_Setup_ssd1327_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u void u8g2_Setup_ssd1327_i2c_seeed_96x96_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1327_i2c_seeed_96x96_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1327_i2c_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1329_128x96_noname_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1329_128x96_noname_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1329_128x96_noname_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ld7032_60x32_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ld7032_60x32_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ld7032_60x32_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); diff --git a/src/clib/u8g2_d_memory.c b/src/clib/u8g2_d_memory.c index 78720647..5255c05b 100644 --- a/src/clib/u8g2_d_memory.c +++ b/src/clib/u8g2_d_memory.c @@ -129,6 +129,24 @@ uint8_t *u8g2_m_ssd1327_12_f(uint8_t *page_cnt) *page_cnt = 12; return buf; } +uint8_t *u8g2_m_ssd1329_16_1(uint8_t *page_cnt) +{ + static uint8_t buf[128]; + *page_cnt = 1; + return buf; +} +uint8_t *u8g2_m_ssd1329_16_2(uint8_t *page_cnt) +{ + static uint8_t buf[256]; + *page_cnt = 2; + return buf; +} +uint8_t *u8g2_m_ssd1329_16_f(uint8_t *page_cnt) +{ + static uint8_t buf[1536]; + *page_cnt = 12; + return buf; +} uint8_t *u8g2_m_ld7032_8_1(uint8_t *page_cnt) { static uint8_t buf[64]; diff --git a/src/clib/u8g2_d_setup.c b/src/clib/u8g2_d_setup.c index bf30ca39..a4678efa 100644 --- a/src/clib/u8g2_d_setup.c +++ b/src/clib/u8g2_d_setup.c @@ -547,6 +547,34 @@ void u8g2_Setup_ssd1327_i2c_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotatio buf = u8g2_m_ssd1327_12_f(&tile_buf_height); u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); } +/* ssd1329 */ +/* ssd1329 1 */ +void u8g2_Setup_ssd1329_128x96_noname_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_ssd1329_16_1(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1329 2 */ +void u8g2_Setup_ssd1329_128x96_noname_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_ssd1329_16_2(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1329 f */ +void u8g2_Setup_ssd1329_128x96_noname_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_ssd1329_16_f(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} /* ld7032 */ /* ld7032 1 */ void u8g2_Setup_ld7032_60x32_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) diff --git a/src/clib/u8x8.h b/src/clib/u8x8.h index 92bce845..a07b2120 100644 --- a/src/clib/u8x8.h +++ b/src/clib/u8x8.h @@ -744,6 +744,7 @@ uint8_t u8x8_d_st7565_lm6059(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *a uint8_t u8x8_d_st7565_erc12864(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7567_pi_132x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7588_jlx12864(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_d_st75256_jlx256128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_nt7534_tg12864r(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); /* u8x8_d_st7565.c */ uint8_t u8x8_d_ld7032_60x32(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_t6963_240x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); @@ -756,12 +757,14 @@ uint8_t u8x8_d_sed1330_240x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void uint8_t u8x8_d_ra8835_nhd_240x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ssd1325_nhd_128x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ssd1327_seeed_96x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_d_ssd1329_128x96_noname(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1604_jlx19264(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1608_erc24064(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1608_240x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1610_ea_dogxl160(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1611_ea_dogm240(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1611_ea_dogxl240(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_d_uc1617_jlx128128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ks0108_128x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ks0108_erm19264(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_pcd8544_84x48(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); diff --git a/src/clib/u8x8_d_ssd1329.c b/src/clib/u8x8_d_ssd1329.c new file mode 100644 index 00000000..5bea887a --- /dev/null +++ b/src/clib/u8x8_d_ssd1329.c @@ -0,0 +1,297 @@ +/* + + u8x8_d_ssd1329.c + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2016, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + + +#include "u8x8.h" + + + +static const uint8_t u8x8_d_ssd1329_128x96_nhd_init_seq[] = { + + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + + + U8X8_C(0x0ae), /* display off */ + U8X8_CA(0x0b3, 0x091), /* set display clock divide ratio/oscillator frequency (set clock as 135 frames/sec) */ + U8X8_CA(0x0a8, 0x03f), /* multiplex ratio: 0x03f * 1/64 duty */ + U8X8_CA(0x0a2, 0x04c), /* display offset, shift mapping ram counter */ + U8X8_CA(0x0a1, 0x000), /* display start line */ + U8X8_CA(0x0ad, 0x002), /* master configuration: disable embedded DC-DC, enable internal VCOMH */ + U8X8_CA(0x0a0, 0x052), /* remap configuration, horizontal address increment (bit 2 = 0), enable nibble remap (upper nibble is left, bit 1 = 1) */ + U8X8_C(0x086), /* full current range (0x084, 0x085, 0x086) */ +#ifdef removed + U8X8_C(0x0b8), /* set gray scale table */ + U8X8_A(1), /* */ + U8X8_A(5), /* */ + U8X8_A(10), /* */ + U8X8_A(14), /* */ + U8X8_A(19), /* */ + U8X8_A(23), /* */ + U8X8_A(28), /* */ + U8X8_A(32), /* */ + U8X8_A(37), /* */ + U8X8_A(41), /* */ + U8X8_A(46), /* */ + U8X8_A(50), /* */ + U8X8_A(55), /* */ + U8X8_A(59), /* */ + U8X8_A(63), /* */ +#endif + + U8X8_C(0x0b7), /* set default gray scale table */ + + U8X8_CA(0x081, 0x070), /* contrast, brightness, 0..128 */ + U8X8_CA(0x0b2, 0x051), /* frame frequency (row period) */ + U8X8_CA(0x0b1, 0x055), /* phase length */ + U8X8_CA(0x0bc, 0x010), /* pre-charge voltage level */ + U8X8_CA(0x0b4, 0x002), /* set pre-charge compensation level (not documented in the SDD1325 datasheet, but used in the NHD init seq.) */ + U8X8_CA(0x0b0, 0x028), /* enable pre-charge compensation (not documented in the SDD1325 datasheet, but used in the NHD init seq.) */ + U8X8_CA(0x0be, 0x01c), /* VCOMH voltage */ + U8X8_CA(0x0bf, 0x002|0x00d), /* VSL voltage level (not documented in the SDD1325 datasheet, but used in the NHD init seq.) */ + U8X8_C(0x0a4), /* normal display mode */ + + U8X8_CA(0x023, 0x003), /* graphics accelleration: fill pixel */ + + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_ssd1329_128x96_nhd_powersave0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0af), /* display on */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_ssd1329_128x96_nhd_powersave1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0ae), /* display off */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_ssd1329_128x96_nhd_flip0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_CA(0x0a0, 0x052), /* remap */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_ssd1329_128x96_nhd_flip1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_CA(0x0a0, 0x041), /* remap */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +/* + input: + one tile (8 Bytes) + output: + Tile for ssd1329 (32 Bytes) +*/ + +static uint8_t u8x8_ssd1329_8to32_dest_buf[32]; + +static uint8_t *u8x8_ssd1329_8to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr) +{ + uint8_t v; + uint8_t a,b; + uint8_t i, j; + uint8_t *dest; + + for( j = 0; j < 4; j++ ) + { + dest = u8x8_ssd1329_8to32_dest_buf; + dest += j; + a =*ptr; + ptr++; + b = *ptr; + ptr++; + for( i = 0; i < 8; i++ ) + { + v = 0; + if ( a&1 ) v |= 0xf0; + if ( b&1 ) v |= 0x0f; + *dest = v; + dest+=4; + a >>= 1; + b >>= 1; + } + } + + return u8x8_ssd1329_8to32_dest_buf; +} + + + + +static uint8_t u8x8_d_ssd1329_128x96_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t x, y, c; + uint8_t *ptr; + switch(msg) + { + /* handled by the calling function + case U8X8_MSG_DISPLAY_SETUP_MEMORY: + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1329_128x96_nhd_display_info); + break; + */ + case U8X8_MSG_DISPLAY_INIT: + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1329_128x96_nhd_init_seq); + break; + case U8X8_MSG_DISPLAY_SET_POWER_SAVE: + if ( arg_int == 0 ) + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1329_128x96_nhd_powersave0_seq); + else + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1329_128x96_nhd_powersave1_seq); + break; + case U8X8_MSG_DISPLAY_SET_FLIP_MODE: + if ( arg_int == 0 ) + { + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1329_128x96_nhd_flip0_seq); + u8x8->x_offset = u8x8->display_info->default_x_offset; + } + else + { + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1329_128x96_nhd_flip1_seq); + u8x8->x_offset = u8x8->display_info->flipmode_x_offset; + } + break; +#ifdef U8X8_WITH_SET_CONTRAST + case U8X8_MSG_DISPLAY_SET_CONTRAST: + u8x8_cad_StartTransfer(u8x8); + u8x8_cad_SendCmd(u8x8, 0x081 ); + u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1329 has range from 0 to 255 */ + u8x8_cad_EndTransfer(u8x8); + break; +#endif + case U8X8_MSG_DISPLAY_DRAW_TILE: + u8x8_cad_StartTransfer(u8x8); + x = ((u8x8_tile_t *)arg_ptr)->x_pos; + x *= 4; + + y = (((u8x8_tile_t *)arg_ptr)->y_pos); + y *= 8; + y += u8x8->x_offset; /* x_offset is used as y offset for the ssd1329 */ + + + do + { + c = ((u8x8_tile_t *)arg_ptr)->cnt; + ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; + + do + { + if ( ptr[0] | ptr[1] | ptr[2] | ptr[3] | ptr[4] | ptr[5] | ptr[6] | ptr[7] ) + { + /* draw the tile if pattern is not zero for all bytes */ + u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */ + u8x8_cad_SendArg(u8x8, x ); /* start */ + u8x8_cad_SendArg(u8x8, x+3 ); /* end */ + + u8x8_cad_SendCmd(u8x8, 0x075 ); /* set row address */ + u8x8_cad_SendArg(u8x8, y); + u8x8_cad_SendArg(u8x8, y+7); + + + u8x8_cad_SendData(u8x8, 32, u8x8_ssd1329_8to32(u8x8, ptr)); + } + else + { + /* tile is empty, use the graphics acceleration command */ + /* are this really available on the SSD1329??? */ + u8x8_cad_SendCmd(u8x8, 0x024 ); // draw rectangle + u8x8_cad_SendArg(u8x8, x ); + u8x8_cad_SendArg(u8x8, y ); + u8x8_cad_SendArg(u8x8, x+3 ); + u8x8_cad_SendArg(u8x8, y+7 ); + u8x8_cad_SendArg(u8x8, 0 ); // clear + } + ptr += 8; + x += 4; + c--; + } while( c > 0 ); + + //x += 4; + arg_int--; + } while( arg_int > 0 ); + + u8x8_cad_EndTransfer(u8x8); + break; + default: + return 0; + } + return 1; +} + + +static const u8x8_display_info_t u8x8_ssd1329_128x96_display_info = +{ + /* chip_enable_level = */ 0, + /* chip_disable_level = */ 1, + + /* post_chip_enable_wait_ns = */ 20, + /* pre_chip_disable_wait_ns = */ 15, + /* reset_pulse_width_ms = */ 100, + /* post_reset_wait_ms = */ 100, /**/ + /* sda_setup_time_ns = */ 100, /* ssd1329 */ + /* sck_pulse_width_ns = */ 100, /* ssd1329 */ + /* sck_clock_hz = */ 4000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */ + /* spi_mode = */ 0, /* active high, rising edge */ + /* i2c_bus_clock_100kHz = */ 4, + /* data_setup_time_ns = */ 40, + /* write_pulse_width_ns = */ 60, /* ssd1329 */ + /* tile_width = */ 16, + /* tile_hight = */ 12, + /* default_x_offset = */ 0, /* x_offset is used as y offset for the ssd1329 */ + /* flipmode_x_offset = */ 0, /* x_offset is used as y offset for the ssd1329 */ + /* pixel_width = */ 128, + /* pixel_height = */ 96 +}; + +uint8_t u8x8_d_ssd1329_128x96_noname(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY ) + { + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1329_128x96_display_info); + return 1; + } + return u8x8_d_ssd1329_128x96_generic(u8x8, msg, arg_int, arg_ptr); +} + + diff --git a/src/clib/u8x8_d_st75256.c b/src/clib/u8x8_d_st75256.c new file mode 100644 index 00000000..86e73299 --- /dev/null +++ b/src/clib/u8x8_d_st75256.c @@ -0,0 +1,510 @@ +/* + + u8x8_d_st75256.c + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2017, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + 0x030 ext 00 + 0x031 ext 01 + 0x038 ext 10 + 0x039 ext 11 + + cad 011 + +*/ + + +#include "u8x8.h" + + +/* not a real power down for the st75256... just a display off */ +static const uint8_t u8x8_d_st75256_256x128_powersave0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x94 ), /* sleep out */ + U8X8_DLY(10), + U8X8_C( 0xaf ), /* display on */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_st75256_256x128_powersave1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xae ), /* display off */ + U8X8_C( 0x95 ), /* sleep in */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + + + +static uint8_t u8x8_d_st75256_256x128_generic(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t x, c; + uint8_t *ptr; + switch(msg) + { + /* handled by the calling function + case U8X8_MSG_DISPLAY_SETUP_MEMORY: + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st75256_256x128_display_info); + break; + */ + /* handled by the calling function + case U8X8_MSG_DISPLAY_INIT: + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_256x128_init_seq); + break; + */ + case U8X8_MSG_DISPLAY_SET_POWER_SAVE: + if ( arg_int == 0 ) + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_256x128_powersave0_seq); + else + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_256x128_powersave1_seq); + + break; +#ifdef U8X8_WITH_SET_CONTRAST + case U8X8_MSG_DISPLAY_SET_CONTRAST: + + u8x8_cad_StartTransfer(u8x8); + + u8x8_cad_SendCmd(u8x8, 0x030 ); + u8x8_cad_SendCmd(u8x8, 0x081 ); /* there are 9 bit for the volume control */ + u8x8_cad_SendArg(u8x8, (arg_int & 0x1f)<<1 ); /* lower 6 bit */ + u8x8_cad_SendArg(u8x8, (arg_int>>5)); /* upper 3 bit */ + + u8x8_cad_EndTransfer(u8x8); + break; +#endif + case U8X8_MSG_DISPLAY_DRAW_TILE: + + u8x8_cad_StartTransfer(u8x8); + x = ((u8x8_tile_t *)arg_ptr)->x_pos; + x *= 8; + + x += u8x8->x_offset; + + u8x8_cad_SendCmd(u8x8, 0x030 ); /* select command set */ + u8x8_cad_SendCmd(u8x8, 0x075 ); /* row */ + u8x8_cad_SendArg(u8x8, (((u8x8_tile_t *)arg_ptr)->y_pos)); + u8x8_cad_SendArg(u8x8, (((u8x8_tile_t *)arg_ptr)->y_pos)); + u8x8_cad_SendCmd(u8x8, 0x015 ); /* col */ + u8x8_cad_SendArg(u8x8, x); + u8x8_cad_SendArg(u8x8, 255); + u8x8_cad_SendCmd(u8x8, 0x05c ); + + + do + { + c = ((u8x8_tile_t *)arg_ptr)->cnt; + ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; + /* SendData can not handle more than 255 bytes, treat c > 31 correctly */ + if ( c > 31 ) + { + u8x8_cad_SendData(u8x8, 248, ptr); + ptr+=248; + c -= 31; + } + u8x8_cad_SendData(u8x8, c*8, ptr); + arg_int--; + } while( arg_int > 0 ); + + u8x8_cad_EndTransfer(u8x8); + break; + default: + return 0; + } + return 1; +} + +/*=============================================*/ + +static const u8x8_display_info_t u8x8_st75256_256x128_display_info = +{ + /* chip_enable_level = */ 0, + /* chip_disable_level = */ 1, + + /* post_chip_enable_wait_ns = */ 20, + /* pre_chip_disable_wait_ns = */ 20, + /* reset_pulse_width_ms = */ 5, + /* post_reset_wait_ms = */ 5, /**/ + /* sda_setup_time_ns = */ 20, /* */ + /* sck_pulse_width_ns = */ 40, /* */ + /* sck_clock_hz = */ 4000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */ + /* spi_mode = */ 0, /* active high, rising edge */ + /* i2c_bus_clock_100kHz = */ 4, /* 400KHz */ + /* data_setup_time_ns = */ 15, + /* write_pulse_width_ns = */ 70, + /* tile_width = */ 32, + /* tile_hight = */ 16, + /* default_x_offset = */ 0, /* must be 0, because this is checked also for normal mode */ + /* flipmode_x_offset = */ 0, + /* pixel_width = */ 256, + /* pixel_height = */ 128 +}; + + +static const uint8_t u8x8_d_st75256_256x128_init_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + + U8X8_DLY(120), + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x06e ), /* enable master */ + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_CA( 0x0d7, 0x09f ), /* disable auto read */ + U8X8_DLY(20), + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_CA( 0x0e0, 0x000 ), /* enable OTP read */ + U8X8_DLY(20), + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x0e3 ), /* OTP Upload */ + U8X8_DLY(20), + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x0e1 ), /* OTP controll out */ + U8X8_DLY(20), + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x094 ), /* sleep out */ + U8X8_DLY(10), + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xae ), /* display off */ + U8X8_DLY(10), + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CA( 0x020, 0x00b ), /* Power control: Regulator, follower & booster on */ + U8X8_DLY(10), + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CAA( 0x81, 0x36, 0x05 ), /* Volume control */ + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x020 ), /* gray levels */ + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x17 ), + U8X8_A( 0x17), + U8X8_A( 0x17 ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x1d ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x1d ), + U8X8_A( 0x1d ), + U8X8_A( 0x1d ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x032 ), /* analog circuit set */ + U8X8_A( 0x000 ), /* code example: OSC Frequency adjustment */ + U8X8_A( 0x001 ), /* Frequency on booster capacitors 1 = 6KHz? */ + U8X8_A( 0x000 ), /* Bias: 1: 1/13, 2: 1/12, 3: 1/11, 4:1/10, 5:1/9 */ + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_CA( 0x051, 0x0fb ), /* booster level x10 */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CA( 0x0f0, 0x011 ), /* monochrome mode = 0x010*/ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xca ), /* display control, 3 args follow */ + U8X8_A( 0x00 ), /* no clock division */ + U8X8_A( 0x7f ), /* 1/128 duty value from the DS overview page*/ + //U8X8_A( 0x9f ), /* 1/160 duty value from the DS example code */ + U8X8_A( 0x00 ), /* nline off */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CA( 0xbc, 0x00 ), /* data scan dir */ + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x040 ), /* internal power */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xa6 ), /* normal display */ + U8X8_C( 0x22 ), /* all pixel off mode */ + U8X8_C( 0xaf ), /* display on */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CAA(0x75, 0, 16), /* row range */ + U8X8_CAA(0x15, 0, 255), /* col range */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x5c ), /* write data to RAM */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + U8X8_A( 0xaa ), /* */ + + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + U8X8_A( 0x55 ), /* */ + + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_st75256_256x128_init_seq_x[] = { + + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + + U8X8_C( 0x030 ), /* select 00 commands */ + + U8X8_C( 0x094 ), /* sleep out */ + U8X8_DLY(10), + //U8X8_C( 0xae ), /* display off */ + + + U8X8_C( 0x031 ), /* select 01 commands */ + + U8X8_C( 0x0d7 ), /* OTP Auto Read */ + U8X8_A( 0x09f ), /* ... disable */ + U8X8_C( 0x032 ), /* analog circuit set */ + U8X8_A( 0x000 ), /* code example: OSC Frequency adjustment */ + U8X8_A( 0x001 ), /* Frequency on booster capacitors 1 = 6KHz? */ + U8X8_A( 0x000 ), /* Bias: 1: 1/13, 2: 1/12, 3: 1/11, 4:1/10, 5:1/9 */ + U8X8_CA( 0x051, 0x0fb ), /* booster level x10 */ + + U8X8_C( 0x020 ), /* gray levels */ + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x1f ), + U8X8_A( 0x1f ), + U8X8_A( 0x1f ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x1f ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), + U8X8_A( 0x1f ), + U8X8_A( 0x1f ), + U8X8_A( 0x1f ), + U8X8_A( 0x00 ), + U8X8_A( 0x00 ), +/* + U8X8_A( 0x01 ), + U8X8_A( 0x03 ), + U8X8_A( 0x05 ), + U8X8_A( 0x07 ), + U8X8_A( 0x09 ), + U8X8_A( 0x0b ), + U8X8_A( 0x0d ), + U8X8_A( 0x10 ), + U8X8_A( 0x11 ), + U8X8_A( 0x13 ), + U8X8_A( 0x15 ), + U8X8_A( 0x17 ), + U8X8_A( 0x19 ), + U8X8_A( 0x1b ), + U8X8_A( 0x1d ), + U8X8_A( 0x1f ), +*/ + U8X8_C( 0x030 ), /* select 00 commands */ + + U8X8_C( 0xca ), /* display control, 3 args follow */ + U8X8_A( 0x00 ), /* no clock division */ + U8X8_A( 0x7f ), /* 1/128 duty value from the DS overview page*/ + //U8X8_A( 0x9f ), /* 1/160 duty value from the DS example code */ + U8X8_A( 0x00 ), /* nline off */ + U8X8_CA( 0x0f0, 0x011 ), /* monochrome mode */ + //U8X8_C( 0x76 ), /* ICON */ + + //U8X8_C( 0xd1 ), /* OSC on */ + + U8X8_CAA( 0x81, 0x36, 0x05 ), /* Volume control */ + U8X8_CA( 0x020, 0x00b ), /* Power control: Regulator, follower & booster on */ + U8X8_DLY(10), + U8X8_CA( 0xbc, 0x00 ), /* data scan dir */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xa6 ), /* normal display */ + U8X8_C( 0x22 ), /* all pixel off mode */ + + U8X8_C( 0x031 ), /* select 01 commands */ + U8X8_C( 0x040 ), /* internal power */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0xaf ), /* display on */ + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x077 ), /* enable ICON */ + U8X8_CAA( 0x015,0,255 ), /* col */ + U8X8_C( 0x5c ), /* write data to RAM */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_C( 0x076 ), /* disable ICON */ + + + + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_CAA(0x75, 1, 2), /* row range */ + U8X8_CAA(0x15, 0, 50), /* col range */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_C( 0x5c ), /* write data to RAM */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xfc ), /* */ + U8X8_A( 0xf0 ), /* */ + U8X8_A( 0xc0 ), /* */ + U8X8_A( 0xf0 ), /* */ + U8X8_A( 0xfc ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xfc ), /* */ + U8X8_A( 0xf0 ), /* */ + U8X8_A( 0xc0 ), /* */ + U8X8_A( 0xf0 ), /* */ + U8X8_A( 0xfc ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + U8X8_A( 0xff ), /* */ + + + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +static const uint8_t u8x8_d_st75256_jlx12864_flip0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_st75256_jlx12864_flip1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C( 0x030 ), /* select 00 commands */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +uint8_t u8x8_d_st75256_jlx256128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + if ( u8x8_d_st75256_256x128_generic(u8x8, msg, arg_int, arg_ptr) != 0 ) + return 1; + if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY ) + { + u8x8_SetI2CAddress(u8x8, 0x078); /* lowest I2C adr of the ST75256 */ + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st75256_256x128_display_info); + return 1; + } + else if ( msg == U8X8_MSG_DISPLAY_INIT ) + { + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_256x128_init_seq); + for(;;) + ; + return 1; + } + else if ( msg == U8X8_MSG_DISPLAY_SET_FLIP_MODE ) + { + if ( arg_int == 0 ) + { + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_jlx12864_flip0_seq); + u8x8->x_offset = u8x8->display_info->default_x_offset; + } + else + { + u8x8_cad_SendSequence(u8x8, u8x8_d_st75256_jlx12864_flip1_seq); + u8x8->x_offset = u8x8->display_info->flipmode_x_offset; + } + return 1; + } + return 0; +} + + diff --git a/src/clib/u8x8_d_st7588.c b/src/clib/u8x8_d_st7588.c index dd48d457..dd1d4df8 100644 --- a/src/clib/u8x8_d_st7588.c +++ b/src/clib/u8x8_d_st7588.c @@ -101,9 +101,9 @@ static uint8_t u8x8_d_st7588_128x64_generic(u8x8_t *u8x8, uint8_t msg, uint8_t a u8x8_cad_StartTransfer(u8x8); u8x8_cad_SendCmd(u8x8, FS ); - u8x8_cad_SendCmd(u8x8, 4 | (arg_int>>7) ); + u8x8_cad_SendArg(u8x8, 4 | (arg_int>>7) ); u8x8_cad_SendCmd(u8x8, FS | 1); - u8x8_cad_SendCmd(u8x8, 0x080 | arg_int ); + u8x8_cad_SendArg(u8x8, 0x080 | arg_int ); /* restore orientation */ if ( u8x8->x_offset == 0 ) diff --git a/src/clib/u8x8_d_uc1617.c b/src/clib/u8x8_d_uc1617.c new file mode 100644 index 00000000..d1f3e939 --- /dev/null +++ b/src/clib/u8x8_d_uc1617.c @@ -0,0 +1,241 @@ +/* + + u8x8_d_uc1617.c + + Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) + + Copyright (c) 2017, olikraus@gmail.com + All rights reserved. + + Redistribution and use in source and binary forms, with or without modification, + are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, this list + of conditions and the following disclaimer. + + * Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +*/ +#include "u8x8.h" + + + + + +static const uint8_t u8x8_d_uc1617_powersave0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0ad), /* display on */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_uc1617_powersave1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0ac), /* display off, enter sleep mode */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_uc1617_flip0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0c4), /* LCD Mapping */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_uc1617_flip1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x0c2), /* LCD Mapping */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +uint8_t u8x8_d_uc1617_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint8_t x, y, c; + uint8_t *ptr; + switch(msg) + { + case U8X8_MSG_DISPLAY_DRAW_TILE: + u8x8_cad_StartTransfer(u8x8); + + x = ((u8x8_tile_t *)arg_ptr)->x_pos; + x *= 8; + x += u8x8->x_offset; + + u8x8_cad_SendCmd(u8x8, 0x000 | ((x&15))); + u8x8_cad_SendCmd(u8x8, 0x010 | (x>>4) ); + + y = ((u8x8_tile_t *)arg_ptr)->y_pos; + u8x8_cad_SendCmd(u8x8, 0x060 | (y&15)); + u8x8_cad_SendCmd(u8x8, 0x070 | (y>>4)); + + c = ((u8x8_tile_t *)arg_ptr)->cnt; + c *= 8; + ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; + do + { + u8x8_cad_SendData(u8x8, c, ptr); /* note: SendData can not handle more than 255 bytes */ + arg_int--; + } while( arg_int > 0 ); + + u8x8_cad_EndTransfer(u8x8); + break; + case U8X8_MSG_DISPLAY_SET_POWER_SAVE: + if ( arg_int == 0 ) + u8x8_cad_SendSequence(u8x8, u8x8_d_uc1617_powersave0_seq); + else + u8x8_cad_SendSequence(u8x8, u8x8_d_uc1617_powersave1_seq); + break; + case U8X8_MSG_DISPLAY_SET_FLIP_MODE: + if ( arg_int == 0 ) + { + u8x8_cad_SendSequence(u8x8, u8x8_d_uc1617_flip0_seq); + u8x8->x_offset = u8x8->display_info->default_x_offset; + } + else + { + u8x8_cad_SendSequence(u8x8, u8x8_d_uc1617_flip1_seq); + u8x8->x_offset = u8x8->display_info->flipmode_x_offset; + } + break; +#ifdef U8X8_WITH_SET_CONTRAST + case U8X8_MSG_DISPLAY_SET_CONTRAST: + u8x8_cad_StartTransfer(u8x8); + u8x8_cad_SendCmd(u8x8, 0x081 ); + u8x8_cad_SendArg(u8x8, arg_int ); /* uc1617 has range from 0 to 255 */ + u8x8_cad_EndTransfer(u8x8); + break; +#endif + default: + return 0; + } + return 1; +} + +/*================================================*/ +/* JLX128128 */ + +static const uint8_t u8x8_d_uc1617_jlx128128_init_seq[] = { + + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + + U8X8_C(0x0e2), /* reset */ + U8X8_DLY(10), + + //U8X8_D1(0x0ff), + U8X8_C(0x027), /* temperature compensation */ + U8X8_C(0x02b), /* panel loading: 13-18nF */ + + U8X8_C(0x02f), /* internal pump control */ + U8X8_C(0x0eb), /* bias=1/11 */ + U8X8_CA(0x081, 0x066), /* set contrast */ + //U8X8_C(0x0a9), /* used in display datasheet, but cmd not described in controller datasheet */ + + U8X8_CA(0x0f1, 0x07f), /* set COM end */ + U8X8_CA(0x0f2, 0x000), /* display line start */ + U8X8_CA(0x0f3, 127), /* display line end */ + U8X8_C(0x0a3), /* line rate */ + + U8X8_C(0x0d3), /* */ + U8X8_C(0x0d7), /* */ + + U8X8_C(0x0ad), /* display enable BW Mode*/ + //U8X8_C(0x0af), /* display enable GS Mode*/ + + //U8X8_C(0x0a5), /* all pixel on */ + + //U8X8_C(0x0d1), /* display pattern */ + U8X8_C(0x089), /* auto increment */ + U8X8_C(0x0c4), /* LCD Mapping */ + U8X8_C(0x000), /* column */ + U8X8_C(0x060), /* page adr low */ + U8X8_C(0x070), /* page adr high */ + + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + U8X8_D1(0x0ff), + + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const u8x8_display_info_t u8x8_uc1617_128x128_display_info = +{ + /* chip_enable_level = */ 0, + /* chip_disable_level = */ 1, + + /* post_chip_enable_wait_ns = */ 10, /* uc1617 datasheet, page 54, actually 5 */ + /* pre_chip_disable_wait_ns = */ 10, /* uc1617 datasheet, page 54, actually 5 */ + /* reset_pulse_width_ms = */ 10, + /* post_reset_wait_ms = */ 20, /* uc1617 datasheet, page 56 */ + /* sda_setup_time_ns = */ 24, /* uc1617 datasheet, page 54 */ + /* sck_pulse_width_ns = */ 45, /* half of cycle time uc1617 datasheet, page 54*/ + /* sck_clock_hz = */ 8000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */ + /* spi_mode = */ 0, /* active high, rising edge */ + /* i2c_bus_clock_100kHz = */ 4, + /* data_setup_time_ns = */ 30, /* uc1617 datasheet, page 52 */ + /* write_pulse_width_ns = */ 65, /* uc1617 datasheet, page 52 */ + /* tile_width = */ 16, /* width of 16*8=128 pixel */ + /* tile_hight = */ 16, + /* default_x_offset = */ 0, + /* flipmode_x_offset = */ 0, + /* pixel_width = */ 128, + /* pixel_height = */ 128 +}; + +uint8_t u8x8_d_uc1617_jlx128128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + /* call common procedure first and handle messages there */ + if ( u8x8_d_uc1617_common(u8x8, msg, arg_int, arg_ptr) == 0 ) + { + /* msg not handled, then try here */ + switch(msg) + { + case U8X8_MSG_DISPLAY_SETUP_MEMORY: + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_uc1617_128x128_display_info); + break; + case U8X8_MSG_DISPLAY_INIT: + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_uc1617_jlx128128_init_seq); + for(;;) + ; + break; + default: + return 0; /* msg unknown */ + } + } + return 1; +}