From 4be8e9a4fe786205d0c48c25a3028d9075178f5d Mon Sep 17 00:00:00 2001 From: olikraus Date: Thu, 19 Oct 2017 22:44:55 +0200 Subject: [PATCH] 2.20.0 --- examples/full_buffer/FPS/FPS.ino | 1 + .../full_buffer/GraphicsTest/GraphicsTest.ino | 1 + .../full_buffer/HelloWorld/HelloWorld.ino | 1 + examples/full_buffer/PrintUTF8/PrintUTF8.ino | 1 + .../SelectionList/SelectionList.ino | 1 + examples/full_buffer/U8g2Logo/U8g2Logo.ino | 1 + examples/page_buffer/Chinese/Chinese.ino | 1 + examples/page_buffer/Clock/Clock.ino | 1 + .../page_buffer/ContrastTest/ContrastTest.ino | 1 + .../page_buffer/DirectAccess/DirectAccess.ino | 1 + examples/page_buffer/ExtUTF8/ExtUTF8.ino | 1 + examples/page_buffer/FPS/FPS.ino | 1 + examples/page_buffer/FlipMode/FlipMode.ino | 1 + .../page_buffer/GraphicsTest/GraphicsTest.ino | 1 + .../page_buffer/HelloWorld/HelloWorld.ino | 1 + examples/page_buffer/Japanese/Japanese.ino | 1 + examples/page_buffer/Korean/Korean.ino | 1 + .../PowerSaveTest/PowerSaveTest.ino | 1 + .../PrintHelloWorld/PrintHelloWorld.ino | 1 + examples/page_buffer/PrintUTF8/PrintUTF8.ino | 1 + .../ScrollingText/ScrollingText.ino | 1 + .../SelectionList/SelectionList.ino | 1 + examples/page_buffer/U8g2Logo/U8g2Logo.ino | 1 + examples/page_buffer/XBM/XBM.ino | 1 + examples/page_buffer/XORTest/XORTest.ino | 1 + examples/u8x8/FlipMode/FlipMode.ino | 1 + examples/u8x8/GraphicsTest/GraphicsTest.ino | 1 + examples/u8x8/HelloWorld/HelloWorld.ino | 1 + examples/u8x8/MessageBox/MessageBox.ino | 1 + extras/ChangeLog | 1 + library.properties | 2 +- src/U8g2lib.h | 162 ++++++++++++++++++ src/U8x8lib.h | 54 ++++++ src/clib/u8g2.h | 12 +- src/clib/u8g2_bitmap.c | 1 + src/clib/u8g2_d_memory.c | 36 ++-- src/clib/u8g2_d_setup.c | 56 ++++++ src/clib/u8x8.h | 1 + src/clib/u8x8_d_ssd1327.c | 140 +++++++++++++++ src/clib/u8x8_debounce.c | 2 +- 40 files changed, 473 insertions(+), 23 deletions(-) diff --git a/examples/full_buffer/FPS/FPS.ino b/examples/full_buffer/FPS/FPS.ino index 82690e9a..d59e7887 100644 --- a/examples/full_buffer/FPS/FPS.ino +++ b/examples/full_buffer/FPS/FPS.ino @@ -201,6 +201,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/GraphicsTest/GraphicsTest.ino b/examples/full_buffer/GraphicsTest/GraphicsTest.ino index d3f2e1c2..d7b1c400 100644 --- a/examples/full_buffer/GraphicsTest/GraphicsTest.ino +++ b/examples/full_buffer/GraphicsTest/GraphicsTest.ino @@ -85,6 +85,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/HelloWorld/HelloWorld.ino b/examples/full_buffer/HelloWorld/HelloWorld.ino index 25945b4e..a908c3df 100644 --- a/examples/full_buffer/HelloWorld/HelloWorld.ino +++ b/examples/full_buffer/HelloWorld/HelloWorld.ino @@ -84,6 +84,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/PrintUTF8/PrintUTF8.ino b/examples/full_buffer/PrintUTF8/PrintUTF8.ino index 8a6d499d..7ae01f74 100644 --- a/examples/full_buffer/PrintUTF8/PrintUTF8.ino +++ b/examples/full_buffer/PrintUTF8/PrintUTF8.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/SelectionList/SelectionList.ino b/examples/full_buffer/SelectionList/SelectionList.ino index a395493a..7aaaf79f 100644 --- a/examples/full_buffer/SelectionList/SelectionList.ino +++ b/examples/full_buffer/SelectionList/SelectionList.ino @@ -84,6 +84,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/full_buffer/U8g2Logo/U8g2Logo.ino b/examples/full_buffer/U8g2Logo/U8g2Logo.ino index 8bfa4303..e296952c 100644 --- a/examples/full_buffer/U8g2Logo/U8g2Logo.ino +++ b/examples/full_buffer/U8g2Logo/U8g2Logo.ino @@ -85,6 +85,7 @@ //U8G2_SSD1325_NHD_128X64_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_F_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_F_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_F_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_F_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/Chinese/Chinese.ino b/examples/page_buffer/Chinese/Chinese.ino index 0ba4ac09..a22ebf1d 100644 --- a/examples/page_buffer/Chinese/Chinese.ino +++ b/examples/page_buffer/Chinese/Chinese.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/Clock/Clock.ino b/examples/page_buffer/Clock/Clock.ino index af58da64..c74fb2f4 100644 --- a/examples/page_buffer/Clock/Clock.ino +++ b/examples/page_buffer/Clock/Clock.ino @@ -89,6 +89,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ContrastTest/ContrastTest.ino b/examples/page_buffer/ContrastTest/ContrastTest.ino index 1b389588..b255717e 100644 --- a/examples/page_buffer/ContrastTest/ContrastTest.ino +++ b/examples/page_buffer/ContrastTest/ContrastTest.ino @@ -86,6 +86,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/DirectAccess/DirectAccess.ino b/examples/page_buffer/DirectAccess/DirectAccess.ino index 60176f6f..8aa96bd1 100644 --- a/examples/page_buffer/DirectAccess/DirectAccess.ino +++ b/examples/page_buffer/DirectAccess/DirectAccess.ino @@ -90,6 +90,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ExtUTF8/ExtUTF8.ino b/examples/page_buffer/ExtUTF8/ExtUTF8.ino index ae6bcb26..ec517fb0 100644 --- a/examples/page_buffer/ExtUTF8/ExtUTF8.ino +++ b/examples/page_buffer/ExtUTF8/ExtUTF8.ino @@ -86,6 +86,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/FPS/FPS.ino b/examples/page_buffer/FPS/FPS.ino index 87b564ee..ef656290 100644 --- a/examples/page_buffer/FPS/FPS.ino +++ b/examples/page_buffer/FPS/FPS.ino @@ -269,6 +269,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/FlipMode/FlipMode.ino b/examples/page_buffer/FlipMode/FlipMode.ino index 8e5ac1c0..78f2a14f 100644 --- a/examples/page_buffer/FlipMode/FlipMode.ino +++ b/examples/page_buffer/FlipMode/FlipMode.ino @@ -81,6 +81,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/GraphicsTest/GraphicsTest.ino b/examples/page_buffer/GraphicsTest/GraphicsTest.ino index a9b7a976..bf4754cb 100644 --- a/examples/page_buffer/GraphicsTest/GraphicsTest.ino +++ b/examples/page_buffer/GraphicsTest/GraphicsTest.ino @@ -86,6 +86,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/HelloWorld/HelloWorld.ino b/examples/page_buffer/HelloWorld/HelloWorld.ino index 5e345519..47db7f5d 100644 --- a/examples/page_buffer/HelloWorld/HelloWorld.ino +++ b/examples/page_buffer/HelloWorld/HelloWorld.ino @@ -86,6 +86,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/Japanese/Japanese.ino b/examples/page_buffer/Japanese/Japanese.ino index 03ddf3ec..3cfd560b 100644 --- a/examples/page_buffer/Japanese/Japanese.ino +++ b/examples/page_buffer/Japanese/Japanese.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/Korean/Korean.ino b/examples/page_buffer/Korean/Korean.ino index f8e831d3..0bb166a2 100644 --- a/examples/page_buffer/Korean/Korean.ino +++ b/examples/page_buffer/Korean/Korean.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/PowerSaveTest/PowerSaveTest.ino b/examples/page_buffer/PowerSaveTest/PowerSaveTest.ino index d44d3761..430ee238 100644 --- a/examples/page_buffer/PowerSaveTest/PowerSaveTest.ino +++ b/examples/page_buffer/PowerSaveTest/PowerSaveTest.ino @@ -80,6 +80,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino b/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino index 565502f5..f19eef3d 100644 --- a/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino +++ b/examples/page_buffer/PrintHelloWorld/PrintHelloWorld.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/PrintUTF8/PrintUTF8.ino b/examples/page_buffer/PrintUTF8/PrintUTF8.ino index 813fe683..e82e8996 100644 --- a/examples/page_buffer/PrintUTF8/PrintUTF8.ino +++ b/examples/page_buffer/PrintUTF8/PrintUTF8.ino @@ -87,6 +87,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/ScrollingText/ScrollingText.ino b/examples/page_buffer/ScrollingText/ScrollingText.ino index 72d0adac..15a46973 100644 --- a/examples/page_buffer/ScrollingText/ScrollingText.ino +++ b/examples/page_buffer/ScrollingText/ScrollingText.ino @@ -90,6 +90,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/SelectionList/SelectionList.ino b/examples/page_buffer/SelectionList/SelectionList.ino index 5eb5e57f..7b29f13e 100644 --- a/examples/page_buffer/SelectionList/SelectionList.ino +++ b/examples/page_buffer/SelectionList/SelectionList.ino @@ -76,6 +76,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/U8g2Logo/U8g2Logo.ino b/examples/page_buffer/U8g2Logo/U8g2Logo.ino index 880ea142..77ee3508 100644 --- a/examples/page_buffer/U8g2Logo/U8g2Logo.ino +++ b/examples/page_buffer/U8g2Logo/U8g2Logo.ino @@ -85,6 +85,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/XBM/XBM.ino b/examples/page_buffer/XBM/XBM.ino index 7bb29b7f..09a7ee11 100644 --- a/examples/page_buffer/XBM/XBM.ino +++ b/examples/page_buffer/XBM/XBM.ino @@ -90,6 +90,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/page_buffer/XORTest/XORTest.ino b/examples/page_buffer/XORTest/XORTest.ino index 66a36ce5..0b457457 100644 --- a/examples/page_buffer/XORTest/XORTest.ino +++ b/examples/page_buffer/XORTest/XORTest.ino @@ -90,6 +90,7 @@ //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8G2_SSD1327_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/u8x8/FlipMode/FlipMode.ino b/examples/u8x8/FlipMode/FlipMode.ino index a23a5abe..c75d2af3 100644 --- a/examples/u8x8/FlipMode/FlipMode.ino +++ b/examples/u8x8/FlipMode/FlipMode.ino @@ -79,6 +79,7 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1327_128X128_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/u8x8/GraphicsTest/GraphicsTest.ino b/examples/u8x8/GraphicsTest/GraphicsTest.ino index 6024253c..0f86778d 100644 --- a/examples/u8x8/GraphicsTest/GraphicsTest.ino +++ b/examples/u8x8/GraphicsTest/GraphicsTest.ino @@ -81,6 +81,7 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1327_128X128_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/u8x8/HelloWorld/HelloWorld.ino b/examples/u8x8/HelloWorld/HelloWorld.ino index 00d5f2fc..84f05188 100644 --- a/examples/u8x8/HelloWorld/HelloWorld.ino +++ b/examples/u8x8/HelloWorld/HelloWorld.ino @@ -78,6 +78,7 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1327_128X128_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/examples/u8x8/MessageBox/MessageBox.ino b/examples/u8x8/MessageBox/MessageBox.ino index 0970c1d6..b3ccf6a7 100644 --- a/examples/u8x8/MessageBox/MessageBox.ino +++ b/examples/u8x8/MessageBox/MessageBox.ino @@ -78,6 +78,7 @@ //U8X8_SSD1325_NHD_128X64_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1327_SEEED_96X96_SW_I2C u8x8(/* clock=*/ SCL, /* data=*/ SDA, /* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 //U8X8_SSD1327_SEEED_96X96_HW_I2C u8x8(/* reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96 +//U8X8_SSD1327_128X128_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1329_128X96_NONAME_4W_HW_SPI u8x8(/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); //U8X8_SSD1305_128X32_NONAME_4W_SW_SPI u8x8(/* clock=*/ 13, /* data=*/ 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); diff --git a/extras/ChangeLog b/extras/ChangeLog index 641b3073..6fafd775 100644 --- a/extras/ChangeLog +++ b/extras/ChangeLog @@ -142,5 +142,6 @@ https://github.com/olikraus/u8g2 ChangeLog * Support for ESP32 I2C pin remapping (issue 377) * Support for ST75256 (SPI), JLX256128, JLX172104 (issue 163) * Added uw-ttyp0 fonts (issue 349) + 2017-xx-xx v2.20.x olikraus@gmail.com diff --git a/library.properties b/library.properties index a8839f3b..fac3090f 100644 --- a/library.properties +++ b/library.properties @@ -1,5 +1,5 @@ name=U8g2 -version=2.19.8 +version=2.20.0 author=oliver maintainer=oliver sentence=Monochrome LCD, OLED and eInk Library. Display controller: SSD1305, SSD1306, SSD1309, SSD1322, SSD1325, SSD1327, SSD1329, SSD1606, SSD1607, SH1106, T6963, RA8835, LC7981, PCD8544, PCF8812, UC1601, UC1604, UC1608, UC1610, UC1611, UC1701, ST7565, ST7567, ST7588, ST75256, NT7534, IST3020, ST7920, LD7032, KS0108, SED1520, SBN1661, IL3820, MAX7219. Interfaces: I2C, SPI, Parallel. diff --git a/src/U8g2lib.h b/src/U8g2lib.h index 0f41e0f0..d8ce9069 100644 --- a/src/U8g2lib.h +++ b/src/U8g2lib.h @@ -2531,6 +2531,168 @@ class U8G2_SSD1327_SEEED_96X96_F_2ND_HW_I2C : public U8G2 { u8x8_SetPin_HW_I2C(getU8x8(), reset); } }; +class U8G2_SSD1327_128X128_1_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_1_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_1_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_1_2ND_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_1_2ND_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_1_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_1_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_128X128_1_6800 : public U8G2 { + public: U8G2_SSD1327_128X128_1_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_1_8080 : public U8G2 { + public: U8G2_SSD1327_128X128_1_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_1(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_2_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_2_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_2_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_2_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_2_2ND_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_2_2ND_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_2_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_2_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_128X128_2_6800 : public U8G2 { + public: U8G2_SSD1327_128X128_2_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_2_8080 : public U8G2 { + public: U8G2_SSD1327_128X128_2_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_2(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_F_4W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_F_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_F_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_F_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_F_2ND_4W_HW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_F_2ND_4W_HW_SPI(const u8g2_cb_t *rotation, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_F_3W_SW_SPI : public U8G2 { + public: U8G2_SSD1327_128X128_F_3W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8G2_SSD1327_128X128_F_6800 : public U8G2 { + public: U8G2_SSD1327_128X128_F_6800(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_F_8080 : public U8G2 { + public: U8G2_SSD1327_128X128_F_8080(const u8g2_cb_t *rotation, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_128x128_f(&u8g2, rotation, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8G2_SSD1327_128X128_1_SW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_1_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_1(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +class U8G2_SSD1327_128X128_1_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_1_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_1(&u8g2, rotation, u8x8_byte_arduino_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +class U8G2_SSD1327_128X128_1_2ND_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_1_2ND_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_1(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset); + } +}; +class U8G2_SSD1327_128X128_2_SW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_2_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_2(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +class U8G2_SSD1327_128X128_2_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_2_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_2(&u8g2, rotation, u8x8_byte_arduino_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +class U8G2_SSD1327_128X128_2_2ND_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_2_2ND_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_2(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset); + } +}; +class U8G2_SSD1327_128X128_F_SW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_F_SW_I2C(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_f(&u8g2, rotation, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +class U8G2_SSD1327_128X128_F_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_F_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_f(&u8g2, rotation, u8x8_byte_arduino_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +class U8G2_SSD1327_128X128_F_2ND_HW_I2C : public U8G2 { + public: U8G2_SSD1327_128X128_F_2ND_HW_I2C(const u8g2_cb_t *rotation, uint8_t reset = U8X8_PIN_NONE) : U8G2() { + u8g2_Setup_ssd1327_i2c_128x128_f(&u8g2, rotation, u8x8_byte_arduino_2nd_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset); + } +}; class U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI : public U8G2 { public: U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI(const u8g2_cb_t *rotation, uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8G2() { u8g2_Setup_ssd1329_128x96_noname_1(&u8g2, rotation, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); diff --git a/src/U8x8lib.h b/src/U8x8lib.h index f4e2285a..d6891381 100644 --- a/src/U8x8lib.h +++ b/src/U8x8lib.h @@ -1010,6 +1010,60 @@ class U8X8_SSD1327_SEEED_96X96_2ND_HW_I2C : public U8X8 { u8x8_SetPin_HW_I2C(getU8x8(), reset); } }; +class U8X8_SSD1327_128X128_4W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_128X128_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_SW_SPI(getU8x8(), clock, data, cs, dc, reset); + } +}; +class U8X8_SSD1327_128X128_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_128X128_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_arduino_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8X8_SSD1327_128X128_2ND_4W_HW_SPI : public U8X8 { + public: U8X8_SSD1327_128X128_2ND_4W_HW_SPI(uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_arduino_2nd_hw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_4Wire_HW_SPI(getU8x8(), cs, dc, reset); + } +}; +class U8X8_SSD1327_128X128_3W_SW_SPI : public U8X8 { + public: U8X8_SSD1327_128X128_3W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_3wire_sw_spi, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_3Wire_SW_SPI(getU8x8(), clock, data, cs, reset); + } +}; +class U8X8_SSD1327_128X128_6800 : public U8X8 { + public: U8X8_SSD1327_128X128_6800(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_8bit_6800mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_6800(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_128X128_8080 : public U8X8 { + public: U8X8_SSD1327_128X128_8080(uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7, uint8_t enable, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_001, u8x8_byte_arduino_8bit_8080mode, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_8Bit_8080(getU8x8(), d0, d1, d2, d3, d4, d5, d6, d7, enable, cs, dc, reset); + } +}; +class U8X8_SSD1327_128X128_SW_I2C : public U8X8 { + public: U8X8_SSD1327_128X128_SW_I2C(uint8_t clock, uint8_t data, uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_SW_I2C(getU8x8(), clock, data, reset); + } +}; +class U8X8_SSD1327_128X128_HW_I2C : public U8X8 { + public: U8X8_SSD1327_128X128_HW_I2C(uint8_t reset = U8X8_PIN_NONE, uint8_t clock = U8X8_PIN_NONE, uint8_t data = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_arduino_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset, clock, data); + } +}; +class U8X8_SSD1327_128X128_2ND_HW_I2C : public U8X8 { + public: U8X8_SSD1327_128X128_2ND_HW_I2C(uint8_t reset = U8X8_PIN_NONE) : U8X8() { + u8x8_Setup(getU8x8(), u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, u8x8_byte_arduino_2nd_hw_i2c, u8x8_gpio_and_delay_arduino); + u8x8_SetPin_HW_I2C(getU8x8(), reset); + } +}; class U8X8_SSD1329_128X96_NONAME_4W_SW_SPI : public U8X8 { public: U8X8_SSD1329_128X96_NONAME_4W_SW_SPI(uint8_t clock, uint8_t data, uint8_t cs, uint8_t dc, uint8_t reset = U8X8_PIN_NONE) : U8X8() { u8x8_Setup(getU8x8(), u8x8_d_ssd1329_128x96_noname, u8x8_cad_001, u8x8_byte_arduino_4wire_sw_spi, u8x8_gpio_and_delay_arduino); diff --git a/src/clib/u8g2.h b/src/clib/u8g2.h index 22b95802..da441368 100644 --- a/src/clib/u8g2.h +++ b/src/clib/u8g2.h @@ -436,15 +436,15 @@ uint8_t *u8g2_m_12_2_f(uint8_t *page_cnt); uint8_t *u8g2_m_12_12_1(uint8_t *page_cnt); uint8_t *u8g2_m_12_12_2(uint8_t *page_cnt); uint8_t *u8g2_m_12_12_f(uint8_t *page_cnt); +uint8_t *u8g2_m_16_16_1(uint8_t *page_cnt); +uint8_t *u8g2_m_16_16_2(uint8_t *page_cnt); +uint8_t *u8g2_m_16_16_f(uint8_t *page_cnt); uint8_t *u8g2_m_16_12_1(uint8_t *page_cnt); uint8_t *u8g2_m_16_12_2(uint8_t *page_cnt); uint8_t *u8g2_m_16_12_f(uint8_t *page_cnt); uint8_t *u8g2_m_24_4_1(uint8_t *page_cnt); uint8_t *u8g2_m_24_4_2(uint8_t *page_cnt); uint8_t *u8g2_m_24_4_f(uint8_t *page_cnt); -uint8_t *u8g2_m_16_16_1(uint8_t *page_cnt); -uint8_t *u8g2_m_16_16_2(uint8_t *page_cnt); -uint8_t *u8g2_m_16_16_f(uint8_t *page_cnt); uint8_t *u8g2_m_13_8_1(uint8_t *page_cnt); uint8_t *u8g2_m_13_8_2(uint8_t *page_cnt); uint8_t *u8g2_m_13_8_f(uint8_t *page_cnt); @@ -603,6 +603,12 @@ void u8g2_Setup_ssd1327_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u void u8g2_Setup_ssd1327_i2c_seeed_96x96_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1327_i2c_seeed_96x96_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1327_i2c_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_128x128_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_128x128_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_128x128_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_i2c_128x128_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_i2c_128x128_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); +void u8g2_Setup_ssd1327_i2c_128x128_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1329_128x96_noname_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1329_128x96_noname_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); void u8g2_Setup_ssd1329_128x96_noname_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb); diff --git a/src/clib/u8g2_bitmap.c b/src/clib/u8g2_bitmap.c index bb9d05f0..fafd2cf9 100644 --- a/src/clib/u8g2_bitmap.c +++ b/src/clib/u8g2_bitmap.c @@ -78,6 +78,7 @@ void u8g2_DrawHorizontalBitmap(u8g2_t *u8g2, u8g2_uint_t x, u8g2_uint_t y, u8g2_ } len--; } + u8g2->draw_color = color; } diff --git a/src/clib/u8g2_d_memory.c b/src/clib/u8g2_d_memory.c index 0b10dd99..c4a7619e 100644 --- a/src/clib/u8g2_d_memory.c +++ b/src/clib/u8g2_d_memory.c @@ -111,6 +111,24 @@ uint8_t *u8g2_m_12_12_f(uint8_t *page_cnt) *page_cnt = 12; return buf; } +uint8_t *u8g2_m_16_16_1(uint8_t *page_cnt) +{ + static uint8_t buf[128]; + *page_cnt = 1; + return buf; +} +uint8_t *u8g2_m_16_16_2(uint8_t *page_cnt) +{ + static uint8_t buf[256]; + *page_cnt = 2; + return buf; +} +uint8_t *u8g2_m_16_16_f(uint8_t *page_cnt) +{ + static uint8_t buf[2048]; + *page_cnt = 16; + return buf; +} uint8_t *u8g2_m_16_12_1(uint8_t *page_cnt) { static uint8_t buf[128]; @@ -147,24 +165,6 @@ uint8_t *u8g2_m_24_4_f(uint8_t *page_cnt) *page_cnt = 4; return buf; } -uint8_t *u8g2_m_16_16_1(uint8_t *page_cnt) -{ - static uint8_t buf[128]; - *page_cnt = 1; - return buf; -} -uint8_t *u8g2_m_16_16_2(uint8_t *page_cnt) -{ - static uint8_t buf[256]; - *page_cnt = 2; - return buf; -} -uint8_t *u8g2_m_16_16_f(uint8_t *page_cnt) -{ - static uint8_t buf[2048]; - *page_cnt = 16; - return buf; -} uint8_t *u8g2_m_13_8_1(uint8_t *page_cnt) { static uint8_t buf[104]; diff --git a/src/clib/u8g2_d_setup.c b/src/clib/u8g2_d_setup.c index d9131adb..868f6c95 100644 --- a/src/clib/u8g2_d_setup.c +++ b/src/clib/u8g2_d_setup.c @@ -763,6 +763,62 @@ void u8g2_Setup_ssd1327_i2c_seeed_96x96_f(u8g2_t *u8g2, const u8g2_cb_t *rotatio buf = u8g2_m_12_12_f(&tile_buf_height); u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); } +/* ssd1327 */ +/* ssd1327 1 */ +void u8g2_Setup_ssd1327_128x128_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_1(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1327 2 */ +void u8g2_Setup_ssd1327_128x128_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_2(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1327 f */ +void u8g2_Setup_ssd1327_128x128_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_001, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_f(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1327 */ +/* ssd1327 1 */ +void u8g2_Setup_ssd1327_i2c_128x128_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_1(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1327 2 */ +void u8g2_Setup_ssd1327_i2c_128x128_2(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_2(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} +/* ssd1327 f */ +void u8g2_Setup_ssd1327_i2c_128x128_f(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) +{ + uint8_t tile_buf_height; + uint8_t *buf; + u8g2_SetupDisplay(u8g2, u8x8_d_ssd1327_128x128, u8x8_cad_ssd13xx_i2c, byte_cb, gpio_and_delay_cb); + buf = u8g2_m_16_16_f(&tile_buf_height); + u8g2_SetupBuffer(u8g2, buf, tile_buf_height, u8g2_ll_hvline_vertical_top_lsb, rotation); +} /* ssd1329 */ /* ssd1329 1 */ void u8g2_Setup_ssd1329_128x96_noname_1(u8g2_t *u8g2, const u8g2_cb_t *rotation, u8x8_msg_cb byte_cb, u8x8_msg_cb gpio_and_delay_cb) diff --git a/src/clib/u8x8.h b/src/clib/u8x8.h index 7fc3e95d..fca144d8 100644 --- a/src/clib/u8x8.h +++ b/src/clib/u8x8.h @@ -789,6 +789,7 @@ uint8_t u8x8_d_ra8835_nhd_240x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, vo uint8_t u8x8_d_ra8835_320x240(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ssd1325_nhd_128x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ssd1327_seeed_96x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_d_ssd1327_128x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_ssd1329_128x96_noname(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1601_128x32(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_uc1604_jlx19264(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); diff --git a/src/clib/u8x8_d_ssd1327.c b/src/clib/u8x8_d_ssd1327.c index a7cdf4b1..7273e496 100644 --- a/src/clib/u8x8_d_ssd1327.c +++ b/src/clib/u8x8_d_ssd1327.c @@ -309,3 +309,143 @@ uint8_t u8x8_d_ssd1327_seeed_96x96(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, v } +/*=============================================*/ +/* MIDAS MCOT128128C1V-YM 128x128 Module */ + + +static const u8x8_display_info_t u8x8_ssd1327_128x128_display_info = +{ + /* chip_enable_level = */ 0, + /* chip_disable_level = */ 1, + + /* post_chip_enable_wait_ns = */ 20, + /* pre_chip_disable_wait_ns = */ 10, + /* reset_pulse_width_ms = */ 100, + /* post_reset_wait_ms = */ 100, /**/ + /* sda_setup_time_ns = */ 100, /* */ + /* sck_pulse_width_ns = */ 100, /* */ + /* sck_clock_hz = */ 4000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */ + /* spi_mode = */ 0, /* active high, rising edge */ + /* i2c_bus_clock_100kHz = */ 1, /* use 1 instead of 4, because the SSD1327 seems to be very slow */ + /* data_setup_time_ns = */ 40, + /* write_pulse_width_ns = */ 60, + /* tile_width = */ 16, + /* tile_hight = */ 16, + /* default_x_offset = */ 0, + /* flipmode_x_offset = */ 0, + /* pixel_width = */ 128, + /* pixel_height = */ 128 +}; + +/* https://github.com/SeeedDocument/Grove_OLED_1.12/raw/master/resources/LY120-096096.pdf */ +/* http://www.seeedstudio.com/wiki/index.php?title=Twig_-_OLED_96x96 */ +/* values from u8glib */ +/* + Re-map setting in Graphic Display Data RAM, command 0x0a0 + Bit 0: Column Address Re-map + Bit 1: Nibble Re-map + Bit 2: Horizontal/Vertical Address Increment + Bit 3: Not used, must be 0 + + Bit 4: COM Re-map + Bit 5: Not used, must be 0 + Bit 6: COM Split Odd Even + Bit 7: Not used, must be 0 +*/ + + +static const uint8_t u8x8_d_ssd1327_128x128_init_seq[] = { + + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + + + U8X8_CA(0x0fd, 0x012), /* unlock display, usually not required because the display is unlocked after reset */ + U8X8_C(0x0ae), /* display off */ + //U8X8_CA(0x0a8, 0x03f), /* multiplex ratio: 0x03f * 1/64 duty */ + //U8X8_CA(0x0a8, 0x05f), /* multiplex ratio: 0x05f * 1/64 duty */ + U8X8_CA(0x0a8, 0x07f), /* multiplex ratio: 0x05f * 1/128duty */ + U8X8_CA(0x0a1, 0x000), /* display start line */ + //U8X8_CA(0x0a2, 0x04c), /* display offset, shift mapping ram counter */ + + U8X8_CA(0x0a2, 0x000), /* display offset, shift mapping ram counter */ + U8X8_CA(0x0a0, 0x051), /* remap configuration */ + + + U8X8_CA(0x0ab, 0x001), /* Enable internal VDD regulator (RESET) */ + //U8X8_CA(0x081, 0x070), /* contrast, brightness, 0..128 */ + U8X8_CA(0x081, 0x053), /* contrast, brightness, 0..128 */ + //U8X8_CA(0x0b1, 0x055), /* phase length */ + U8X8_CA(0x0b1, 0x051), /* phase length */ + //U8X8_CA(0x0b3, 0x091), /* set display clock divide ratio/oscillator frequency (set clock as 135 frames/sec) */ + U8X8_CA(0x0b3, 0x001), /* set display clock divide ratio/oscillator frequency */ + + //? U8X8_CA(0x0ad, 0x002), /* master configuration: disable embedded DC-DC, enable internal VCOMH */ + //? U8X8_C(0x086), /* full current range (0x084, 0x085, 0x086) */ + + U8X8_C(0x0b9), /* use linear lookup table */ + + //U8X8_CA(0x0bc, 0x010), /* pre-charge voltage level */ + U8X8_CA(0x0bc, 0x008), /* pre-charge voltage level */ + //U8X8_CA(0x0be, 0x01c), /* VCOMH voltage */ + U8X8_CA(0x0be, 0x007), /* VCOMH voltage */ + U8X8_CA(0x0b6, 0x001), /* second precharge */ + U8X8_CA(0x0d5, 0x062), /* enable second precharge, internal vsl (bit0 = 0) */ + + + + U8X8_C(0x0a4), /* normal display mode */ + + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +static const uint8_t u8x8_d_ssd1327_128x128_flip0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_CA(0x0a2, 0x020), /* display offset, shift mapping ram counter */ + U8X8_CA(0x0a0, 0x051), /* remap configuration */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + +static const uint8_t u8x8_d_ssd1327_128x128_flip1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_CA(0x0a2, 0x060), /* display offset, shift mapping ram counter */ + U8X8_CA(0x0a0, 0x042), /* remap configuration */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +uint8_t u8x8_d_ssd1327_128x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + /* call the 96x96 procedure at the moment */ + if ( u8x8_d_ssd1327_96x96_generic(u8x8, msg, arg_int, arg_ptr) != 0 ) + return 1; + if ( msg == U8X8_MSG_DISPLAY_SETUP_MEMORY ) + { + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1327_128x128_display_info); + return 1; + } + else if ( msg == U8X8_MSG_DISPLAY_INIT ) + { + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1327_128x128_init_seq); + return 1; + } + else if ( msg == U8X8_MSG_DISPLAY_SET_FLIP_MODE ) + { + if ( arg_int == 0 ) + { + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1327_128x128_flip0_seq); + u8x8->x_offset = u8x8->display_info->default_x_offset; + } + else + { + u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1327_128x128_flip1_seq); + u8x8->x_offset = u8x8->display_info->flipmode_x_offset; + } + return 1; + } + return 0; +} diff --git a/src/clib/u8x8_debounce.c b/src/clib/u8x8_debounce.c index 2aa4acd7..f6dc156b 100644 --- a/src/clib/u8x8_debounce.c +++ b/src/clib/u8x8_debounce.c @@ -136,7 +136,7 @@ uint8_t u8x8_GetMenuEvent(u8x8_t *u8x8) #define U8X8_DEBOUNCE_WAIT 2 /* do debounce and return a GPIO msg which indicates the event */ /* returns 0, if there is no event */ -#ifdef __GNUC__ +#if defined(__GNUC__) && !defined(__CYGWIN__) # pragma weak u8x8_GetMenuEvent #endif uint8_t u8x8_GetMenuEvent(u8x8_t *u8x8)