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Use chamfered edge connector; part updates
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@@ -0,0 +1,84 @@
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(tags "CONN BUS ISA")
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)
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+134
-134
@@ -199,7 +199,7 @@
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(net 118 "unconnected-(U2-Pad9)")
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(net 119 "unconnected-(U2-Pad7)")
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(footprint "PiGUS library:BUS_PC" (layer "F.Cu")
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(footprint "PiGUS library:BUS_PC_chamfer" (layer "F.Cu")
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(at 157.1625 132.0165)
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(descr "Connecteur Bus AT ISA 16 bits")
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@@ -210,143 +210,143 @@
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
)
|
||||
|
||||
(footprint "Capacitor_SMD:C_0805_2012Metric" (layer "F.Cu")
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
{
|
||||
"board": {
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||||
"active_layer": 0,
|
||||
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"hidden_nets": [],
|
||||
|
||||
+185
-55
@@ -4,6 +4,10 @@
|
||||
|
||||
(paper "A4")
|
||||
|
||||
(title_block
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||||
(title "PicoGUS v1.1")
|
||||
)
|
||||
|
||||
(lib_symbols
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(symbol "74FST3257DR2G_1" (pin_names (offset 0.762)) (in_bom yes) (on_board yes)
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(symbol "74xx:74LS04" (in_bom yes) (on_board yes)
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||||
(pin "1" (uuid 3d605ea0-6b16-4677-be74-a64f929e8f52))
|
||||
)
|
||||
|
||||
(symbol (lib_id "74xx:74LS04") (at 84.455 179.07 0) (unit 7)
|
||||
(symbol (lib_id "74xx:74LS14") (at 84.455 179.07 0) (unit 7)
|
||||
(in_bom yes) (on_board yes)
|
||||
(uuid e84f9417-05c8-4897-bf35-a35bd6ee8959)
|
||||
(property "Reference" "U5" (id 0) (at 74.93 189.23 0)
|
||||
@@ -6891,7 +7021,7 @@
|
||||
(property "Footprint" "Package_SO:SOIC-14_3.9x8.7mm_P1.27mm" (id 2) (at 84.455 179.07 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Datasheet" "http://www.ti.com/lit/gpn/sn74LS04" (id 3) (at 84.455 179.07 0)
|
||||
(property "Datasheet" "https://www.ti.com/lit/gpn/sn74lvc14a" (id 3) (at 84.455 179.07 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(pin "1" (uuid 62e356e9-0332-43f9-b2f5-c8e7ace953fb))
|
||||
@@ -6978,17 +7108,17 @@
|
||||
(pin "1" (uuid 5d0afb72-2b8f-45f4-a60a-0685e952f550))
|
||||
)
|
||||
|
||||
(symbol (lib_id "power:+5V") (at 145.415 40.005 0) (unit 1)
|
||||
(symbol (lib_id "power:+5V") (at 146.05 40.005 0) (unit 1)
|
||||
(in_bom yes) (on_board yes)
|
||||
(uuid f1846ac3-b3e8-4373-8ca2-deac92d82e53)
|
||||
(property "Reference" "#PWR0117" (id 0) (at 145.415 43.815 0)
|
||||
(property "Reference" "#PWR0117" (id 0) (at 146.05 43.815 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Value" "+5V" (id 1) (at 145.415 34.925 90))
|
||||
(property "Footprint" "" (id 2) (at 145.415 40.005 0)
|
||||
(property "Value" "+5V" (id 1) (at 146.05 34.925 90))
|
||||
(property "Footprint" "" (id 2) (at 146.05 40.005 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(property "Datasheet" "" (id 3) (at 145.415 40.005 0)
|
||||
(property "Datasheet" "" (id 3) (at 146.05 40.005 0)
|
||||
(effects (font (size 1.27 1.27)) hide)
|
||||
)
|
||||
(pin "1" (uuid d61e0255-1b4e-40cd-9710-e10d63f43626))
|
||||
@@ -7275,7 +7405,7 @@
|
||||
(reference "C10") (unit 1) (value "1uF") (footprint "Capacitor_SMD:C_0805_2012Metric")
|
||||
)
|
||||
(path "/233d2739-7a24-4382-adbe-243fe761d5ad"
|
||||
(reference "D1") (unit 1) (value "D_Schottky") (footprint "Diode_SMD:D_SOD-123F")
|
||||
(reference "D1") (unit 1) (value "1A 20V Schottky") (footprint "Diode_SMD:D_SOD-123F")
|
||||
)
|
||||
(path "/638aa721-d04b-4f05-9bb4-4f533030aaba"
|
||||
(reference "H1") (unit 1) (value "MountingHole_3.2mm_M3_Pad") (footprint "MountingHole:MountingHole_3.2mm_M3_Pad")
|
||||
@@ -7284,7 +7414,7 @@
|
||||
(reference "H2") (unit 1) (value "MountingHole_3.2mm_M3_Pad") (footprint "MountingHole:MountingHole_3.2mm_M3_Pad")
|
||||
)
|
||||
(path "/3b49dd0d-4207-44f7-9b8e-2651f2f5fcd8"
|
||||
(reference "I2S_DAC1") (unit 1) (value "I2S_DAC") (footprint "PiGUS library:GY-PCM5102")
|
||||
(reference "I2S_DAC1") (unit 1) (value "GY PCM5102") (footprint "PiGUS library:GY-PCM5102")
|
||||
)
|
||||
(path "/6eb41fb3-b788-4205-94e5-202ceec2641b"
|
||||
(reference "J1") (unit 1) (value "IRQDMA_JP") (footprint "Connector_PinHeader_2.54mm:PinHeader_2x09_P2.54mm_Vertical")
|
||||
@@ -7371,7 +7501,7 @@
|
||||
(reference "U7") (unit 1) (value "74LVC1G00") (footprint "Package_TO_SOT_SMD:SOT-23-5")
|
||||
)
|
||||
(path "/7320db56-5ec0-4bb2-b9b7-1cabf8a75396"
|
||||
(reference "U8") (unit 1) (value "ESP-PSRAM32") (footprint "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm")
|
||||
(reference "U8") (unit 1) (value "APS6404L-3SQR-SN") (footprint "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm")
|
||||
)
|
||||
(path "/e23594a8-cca3-45b5-b6bc-143afd77699a"
|
||||
(reference "U9") (unit 1) (value "74LVC1G06") (footprint "Package_TO_SOT_SMD:SOT-23-5")
|
||||
|
||||
-251
@@ -1,251 +0,0 @@
|
||||
update=1.7.2021 18.32.44
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=25
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.3
|
||||
TrackWidth3=0.5
|
||||
TrackWidth4=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
Reference in new issue
Block a user