From f0cd14ba78844edada550a41a7d4edc5fff89dd4 Mon Sep 17 00:00:00 2001 From: olikraus Date: Fri, 10 Oct 2025 23:26:50 +0200 Subject: [PATCH] code takeover issue #2661 --- csrc/u8x8.h | 1 + csrc/u8x8_d_st7305.c | 214 ++++++++++++++++++++++++++++++++++++ tools/codebuild/codebuild.c | 6 +- 3 files changed, 217 insertions(+), 4 deletions(-) diff --git a/csrc/u8x8.h b/csrc/u8x8.h index eca97c34..ebb62f64 100644 --- a/csrc/u8x8.h +++ b/csrc/u8x8.h @@ -933,6 +933,7 @@ uint8_t u8x8_d_st7571_g12896(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *a uint8_t u8x8_d_st7302_122x250(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7305_122x250(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7305_200x200(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); +uint8_t u8x8_d_st7305_168x384(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); /* https://github.com/olikraus/u8g2/issues/2661 */ uint8_t u8x8_d_st7586s_s028hn118a(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7586s_jlx384160(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); uint8_t u8x8_d_st7586s_erc240160(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); diff --git a/csrc/u8x8_d_st7305.c b/csrc/u8x8_d_st7305.c index 799832a4..cf6a75a2 100644 --- a/csrc/u8x8_d_st7305.c +++ b/csrc/u8x8_d_st7305.c @@ -476,3 +476,217 @@ uint8_t u8x8_d_st7305_200x200(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void * } return 1; } + + +/*=====================================================================*/ +/* 168x384, https://github.com/olikraus/u8g2/issues/2661 */ + + +static const uint8_t u8x8_d_st7305_168x384_powersave0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x29), // display on + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +static const uint8_t u8x8_d_st7305_168x384_powersave1_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + U8X8_C(0x028), /* display off */ + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +static const uint8_t u8x8_d_st7305_168x384_flip0_seq[] = { + U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ + // U8X8_CA(0x36, 0x60), // Memory Control + U8X8_END_TRANSFER(), /* disable chip */ + U8X8_END() /* end of sequence */ +}; + + +static const uint8_t u8x8_d_st7305_168x384_init_seq[] = { + U8X8_START_TRANSFER(), + + + /* Software Reset */ + U8X8_C(0x01), + U8X8_DLY(100), + + + /* Settings */ + // 以下在芯片手册基础上，按照显示屏厂家给的示例代码调整 + U8X8_CAA(0xD6, 0x13, 0x02), // NVM Load Control + U8X8_CA(0xD1, 0x01), // Booster Enable + U8X8_CAA(0xC0, 0x12, 0x0A), // Gate Voltage Setting: VGH=15V, VGL=-10V + + + U8X8_CAAAA(0xC1, 0x3C, 0x3E, 0x3C, 0x3C), // VSHP Setting: VSHP1~4 = 4.8V + U8X8_CAAAA(0xC2, 0x23, 0x21, 0x23, 0x23), // VSLP Setting: VSHP1~4 = 0.98V + U8X8_CAAAA(0xC4, 0x5A, 0x5C, 0x5A, 0x5A), // VSHN Setting: VSHP1~4 = -3.6V + U8X8_CAAAA(0xC5, 0x37, 0x35, 0x37, 0x37), // VSLN Setting: VSHP1~4 = 0.22V + + + U8X8_CAA(0xD8, 0xA6, 0xE9), // OSC Setting + U8X8_CA(0xB2, 0x12), // Frame Rate Control: HPM=32Hz, LPM=1Hz + + + U8X8_CAAAA(0xB3, 0xE5, 0xF6, 0x17, 0x77), // Update Period Gate EQ Control in HPM + U8X8_A6(0x77, 0x77, 0x77, 0x77, 0x77, 0x71), + + + U8X8_CAA(0xB4, 0x05, 0x46), // Update Period Gate EQ Control in LPM + U8X8_A6(0x77, 0x77, 0x77, 0x77, 0x76, 0x45), + + + U8X8_CAAA(0x62, 0x32, 0x03, 0x1F), // Gate Timing Control + U8X8_CA(0xB7, 0x13), // Source EQ Enable + U8X8_CA(0xB0, 0x60), // Gate Line Setting: 384 line + + + U8X8_C(0x11), // Sleep Out + U8X8_DLY(10), + + + U8X8_CA(0xC9, 0x00), // Source Voltage Select: VSHP1; VSLP1 ; VSHN1 ; VSLN1 + U8X8_CA(0x36, 0x48), // Memory Data Access Control + U8X8_CA(0x3A, 0x11), // Data Format Select + U8X8_CA(0xB9, 0x20), // Gamma Mode Setting: Mono 00:4GS + U8X8_CA(0xB8, 0x29), // Panel Setting, 1-Dot inversion, Frame inversion, One Line Interlace + + + U8X8_CAA(0x2A, 0x17, 0x24), // Column Address Setting: 0X24-0X16=14, 14*12=168 + U8X8_CAA(0x2B, 0x00, 0xBF), // Row Address Setting: 192*2=384 + U8X8_CA(0x35, 0x00), // TE Setting + U8X8_CA(0xD0, 0xFF), // Enable Auto Power down + U8X8_C(0x38), // High Power Mode ON + // U8X8_C(0x39), // Low Power Mode ON + + + /* Display ON */ + U8X8_C(0x29), // Display ON + U8X8_C(0x20), // Display Inversion Off + U8X8_CA(0xBB, 0x4F), // Enable Clear RAM to 0 + + + U8X8_END_TRANSFER(), + U8X8_END() + + +}; + + +static const u8x8_display_info_t u8x8_st7305_168x384_display_info = + { + /* chip_enable_level = */ 0, + /* chip_disable_level = */ 1, + + + /* post_chip_enable_wait_ns = */ 20, + /* pre_chip_disable_wait_ns = */ 20, + /* reset_pulse_width_ms = */ 3, + /* post_reset_wait_ms = */ 3, /**/ + /* sda_setup_time_ns = */ 10, /* */ + /* sck_pulse_width_ns = */ 30, /* */ + /* sck_clock_hz = */ 2000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns */ + /* spi_mode = */ 0, /* active high, rising edge */ + /* i2c_bus_clock_100kHz = */ 4, /* 400KHz */ + /* data_setup_time_ns = */ 15, + /* write_pulse_width_ns = */ 70, + /* tile_width = */ 21, /* tile width is 21*8=168, because this display requires 12 bit blocks, which would be 168 pixel, so next tile is at 168 */ + /* tile_height = */ 48, + /* default_x_offset = */ 0, + /* flipmode_x_offset = */ 0, + /* pixel_width = */ 168, /* not 100% sure, whether this works with the tile_width of 21... */ + /* pixel_height = */ 384}; + + +uint8_t u8x8_d_st7305_168x384(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) +{ + uint16_t x; + uint8_t c, i, y; + uint8_t *ptr; + switch(msg) + { + case U8X8_MSG_DISPLAY_INIT: + u8x8_d_helper_display_init(u8x8); + u8x8_cad_SendSequence(u8x8, u8x8_d_st7305_168x384_init_seq); + break; + case U8X8_MSG_DISPLAY_SETUP_MEMORY: + u8x8_d_helper_display_setup_memory(u8x8, &u8x8_st7305_168x384_display_info); + break; + case U8X8_MSG_DISPLAY_SET_POWER_SAVE: + if ( arg_int == 0 ) + u8x8_cad_SendSequence(u8x8, u8x8_d_st7305_122x250_powersave0_seq); + else + u8x8_cad_SendSequence(u8x8, u8x8_d_st7305_122x250_powersave1_seq); + break; + case U8X8_MSG_DISPLAY_SET_FLIP_MODE: + if ( arg_int == 0 ) + { + u8x8_cad_SendSequence(u8x8, u8x8_d_st7305_122x250_flip0_seq); + u8x8->x_offset = u8x8->display_info->default_x_offset; + } + else + { + u8x8_cad_SendSequence(u8x8, u8x8_d_st7305_122x250_flip1_seq); + u8x8->x_offset = u8x8->display_info->flipmode_x_offset; + } + break; +#ifdef U8X8_WITH_SET_CONTRAST + case U8X8_MSG_DISPLAY_SET_CONTRAST: + u8x8_cad_StartTransfer(u8x8); + u8x8_cad_SendCmd(u8x8, 0x081 ); + u8x8_cad_SendArg(u8x8, arg_int<<2 ); + u8x8_cad_SendArg(u8x8, arg_int>>6 ); + u8x8_cad_EndTransfer(u8x8); + break; +#endif + case U8X8_MSG_DISPLAY_DRAW_TILE: + x = ((u8x8_tile_t *)arg_ptr)->x_pos; + x *= 8; + x += u8x8->x_offset; + y= (((u8x8_tile_t *)arg_ptr)->y_pos); + y*=4; + + y+=0; // specific for the 168x384 LCD + + + u8x8_cad_StartTransfer(u8x8); + + + for( i = 0; i < 4; i++ ) + { + + u8x8_cad_SendCmd(u8x8, 0x2a); // column address set + u8x8_cad_SendArg(u8x8, 0x17); // 0x019 for the 122x250 LCD --> 0x016 for the 200x200 display + u8x8_cad_SendArg(u8x8, 0x24); // 204 pixel for the 200x200 display + + u8x8_cad_SendCmd(u8x8, 0x2b); + u8x8_cad_SendArg(u8x8, y+i); + u8x8_cad_SendArg(u8x8, y+i); + u8x8_cad_SendCmd(u8x8, 0x2c); // write data + + c = ((u8x8_tile_t *)arg_ptr)->cnt; + ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; + + ptr += u8x8->display_info->tile_width*i*2; + + c = (c+2)/3; // calculate the number of 24 bit blocks to send + + + while( c > 0 ) + { + u8x8_cad_SendData(u8x8, 6, u8x8_st7305_convert_a0(u8x8, ptr)); + ptr+=3; + --c; + } + } + u8x8_cad_EndTransfer(u8x8); + break; + default: + return 0; + } + return 1; +} \ No newline at end of file diff --git a/tools/codebuild/codebuild.c b/tools/codebuild/codebuild.c index 3ebdedde..38b90711 100644 --- a/tools/codebuild/codebuild.c +++ b/tools/codebuild/codebuild.c @@ -1771,16 +1771,14 @@ struct controller controller_list[] = }, }, -#ifdef NOTYETIMPLEMENTED { - "st7305", 24, 48, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, + "st7305", 21, 48, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI|COM_3WSPI|COM_6800|COM_8080, "", /* is_generate_u8g2_class= */ 1, { - { "186X384" }, + { "168X384" }, /* https://github.com/olikraus/u8g2/issues/2702 */ { NULL } }, }, -#endif { "st7586s", 48, 17, "u8g2_ll_hvline_horizontal_right_lsb", "u8x8_cad_011", "", COM_4WSPI,