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Code Issues Releases Activity

[ESP32-C5] Add preliminary support for ESP32-C5 with dual band WiFi

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This commit is contained in:
TD-er
2025-05-24 02:24:44 +02:00
parent 5dd624e74e
commit 382dad51a1
41 changed files with 637 additions and 88 deletions
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boards/esp32c5cdc-8M.json
+40
View File
@@ -0,0 +1,40 @@
{
"build": {
"arduino":{
"ldscript": "esp32c5_out.ld"
},
"core": "esp32",
"extra_flags": "-DARDUINO_TASMOTA -DARDUINO_USB_MODE=1 -DUSE_USB_CDC_CONSOLE -DESP32_8M -DESP32C5 -DARDUINO_USB_CDC_ON_BOOT=1",
"f_cpu": "160000000L",
"f_flash": "80000000L",
"flash_mode": "qio",
"mcu": "esp32c5",
"variant": "esp32c5",
"partitions": "boards/partitions/esp32_partition_app3520k_spiffs1088k.csv"
},
"connectivity": [
"wifi",
"bluetooth"
],
"debug": {
"default_tool": "esp-builtin",
"onboard_tools": [
"esp-builtin"
],
"openocd_target": "esp32c5.cfg"
},
"frameworks": [
"arduino",
"espidf"
],
"name": "Espressif Generic ESP32-C5 >= 8M Flash, ESPEasy 3520k Code/OTA 1088k FS",
"upload": {
"flash_size": "8MB",
"maximum_ram_size": 327680,
"maximum_size": 8388608,
"require_upload_port": true,
"speed": 460800
},
"url": "https://docs.espressif.com/projects/espressif-esp-dev-kits/en/latest/esp32c5/esp32-c5-devkitc-1/index.html",
"vendor": "Espressif"
}
boards/esp32c5cdc.json
+40
View File
@@ -0,0 +1,40 @@
{
"build": {
"arduino":{
"ldscript": "esp32c5_out.ld"
},
"core": "esp32",
"extra_flags": "-DARDUINO_TASMOTA -DARDUINO_USB_MODE=1 -DUSE_USB_CDC_CONSOLE -DESP32_4M -DESP32C5 -DARDUINO_USB_CDC_ON_BOOT=1",
"f_cpu": "160000000L",
"f_flash": "80000000L",
"flash_mode": "qio",
"mcu": "esp32c5",
"variant": "esp32c5",
"partitions": "boards/partitions/esp32_partition_app1810k_spiffs316k.csv"
},
"connectivity": [
"wifi",
"bluetooth"
],
"debug": {
"default_tool": "esp-builtin",
"onboard_tools": [
"esp-builtin"
],
"openocd_target": "esp32c5.cfg"
},
"frameworks": [
"arduino",
"espidf"
],
"name": "Espressif Generic ESP32-C5 >= 4M Flash, ESPEasy 1810k Code/OTA 316k FS",
"upload": {
"flash_size": "4MB",
"maximum_ram_size": 327680,
"maximum_size": 4194304,
"require_upload_port": true,
"speed": 460800
},
"url": "https://docs.espressif.com/projects/espressif-esp-dev-kits/en/latest/esp32c5/esp32-c5-devkitc-1/index.html",
"vendor": "Espressif"
}
lib/ESPEasySerial/ESPEasySerialType.h
+10 -2
View File
@@ -22,6 +22,8 @@
# define SOC_RX0 44
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX0 12
# elif CONFIG_IDF_TARGET_ESP32C3
# define SOC_RX0 20
# elif CONFIG_IDF_TARGET_ESP32C2
@@ -36,6 +38,8 @@
# define SOC_TX0 43
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX0 11
# elif CONFIG_IDF_TARGET_ESP32C3
# define SOC_TX0 21
# elif CONFIG_IDF_TARGET_ESP32C2
@@ -50,7 +54,7 @@
# define SOC_RX1 13
# elif CONFIG_IDF_TARGET_ESP32S2
# define SOC_RX1 18
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX1 4
# elif CONFIG_IDF_TARGET_ESP32S3
# define SOC_RX1 15
@@ -62,7 +66,7 @@
# define SOC_TX1 15
# elif CONFIG_IDF_TARGET_ESP32S2
# define SOC_TX1 17
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
# elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX1 5
# elif CONFIG_IDF_TARGET_ESP32S3
# define SOC_TX1 16
@@ -80,6 +84,8 @@
# define SOC_RX2 19
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX2 6
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX2 6
# else // if CONFIG_IDF_TARGET_ESP32
# define SOC_RX2 -1
# endif // if CONFIG_IDF_TARGET_ESP32
@@ -92,6 +98,8 @@
# define SOC_TX2 20
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX2 7
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX2 7
# else // if CONFIG_IDF_TARGET_ESP32
# define SOC_TX2 -1
# endif // if CONFIG_IDF_TARGET_ESP32
lib/ESPEasySerial/ESPEasySerial_common_defines.h
+2 -2
View File
@@ -8,7 +8,7 @@
#ifndef SOC_UART_NUM
# ifdef ESP8266
# define SOC_UART_NUM 2
# elif defined(ESP32_CLASSIC) || defined(ESP32S2) || defined(ESP32S3) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6)
# elif defined(ESP32_CLASSIC) || defined(ESP32S2) || defined(ESP32S3) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6)
# include <soc/soc_caps.h>
# else // ifdef ESP8266
static_assert(false, "Implement processor architecture");
@@ -40,7 +40,7 @@ static_assert(false, "Implement processor architecture");
CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC
CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC
*/
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
// #if CONFIG_TINYUSB_CDC_ENABLED // This define is not recognized here so use USE_USB_CDC_CONSOLE
# ifdef USE_USB_CDC_CONSOLE
lib/GPIO_DirectAccess/GPIO_Direct_Access.h
+5 -5
View File
@@ -152,7 +152,7 @@ void DIRECT_PINMODE_INPUT_ISR(IO_REG_TYPE pin);
static inline __attribute__((always_inline))
IO_REG_TYPE directRead(IO_REG_TYPE pin)
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
return (GPIO.in.val >> pin) & 0x1;
#elif CONFIG_IDF_TARGET_ESP32C6
if ( pin < 32 )
@@ -172,7 +172,7 @@ IO_REG_TYPE directRead(IO_REG_TYPE pin)
static inline __attribute__((always_inline))
void directWriteLow(IO_REG_TYPE pin)
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.out_w1tc.val = ((uint32_t)1 << pin);
#elif CONFIG_IDF_TARGET_ESP32C6
if ( pin < 32 )
@@ -191,7 +191,7 @@ void directWriteLow(IO_REG_TYPE pin)
static inline __attribute__((always_inline))
void directWriteHigh(IO_REG_TYPE pin)
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.out_w1ts.val = ((uint32_t)1 << pin);
#elif CONFIG_IDF_TARGET_ESP32C6
if ( pin < 32 )
@@ -210,7 +210,7 @@ void directWriteHigh(IO_REG_TYPE pin)
static inline __attribute__((always_inline))
void directModeInput(IO_REG_TYPE pin)
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.enable_w1tc.val = ((uint32_t)1 << (pin));
#else
if ( GPIO_IS_VALID_GPIO(pin) )
@@ -243,7 +243,7 @@ void directModeInput(IO_REG_TYPE pin)
static inline __attribute__((always_inline))
void directModeOutput(IO_REG_TYPE pin)
{
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin));
#else
if ( GPIO_IS_VALID_GPIO(pin) && pin <= 33 ) // pins above 33 can be only inputs
lib/ImprovWiFi/src/ImprovTypes.h
+2
View File
@@ -87,6 +87,8 @@ struct ImprovWiFiParamsStruct {
"ESP32-C2"
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
"ESP32-C3"
#elif defined(CONFIG_IDF_TARGET_ESP32C5)
"ESP32-C5"
#elif defined(CONFIG_IDF_TARGET_ESP32C6)
"ESP32-C6"
#elif defined(CONFIG_IDF_TARGET_ESP32H2)
lib/NeoPixelBus/src/internal/DotStarEsp32DmaSpiMethod.h
+8 -8
View File
@@ -29,12 +29,12 @@ License along with NeoPixel. If not, see
#include "driver/spi_master.h"
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)) && !defined(HSPI_HOST)
#if (defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)) && !defined(HSPI_HOST)
// HSPI_HOST depreciated in C3
#define HSPI_HOST SPI2_HOST
#endif
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
class Esp32VspiBus
{
public:
@@ -52,7 +52,7 @@ public:
const static int ParallelBits = 1;
};
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
class Esp32Vspi2BitBus
{
public:
@@ -70,7 +70,7 @@ public:
const static int ParallelBits = 2;
};
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
class Esp32Vspi4BitBus
{
public:
@@ -174,7 +174,7 @@ public:
// If pins aren't specified, initialize bus with just the default SCK and MOSI pins for the SPI peripheral (no SS, no >1-bit pins)
void Initialize()
{
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
if (T_SPIBUS::SpiHostDevice == VSPI_HOST)
{
Initialize(SCK, -1, MOSI, -1, -1, -1);
@@ -277,7 +277,7 @@ private:
int8_t _ssPin;
};
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
// Clock Speed and Default Definitions for DotStarEsp32DmaVspi
typedef DotStarEsp32DmaSpiMethod<SpiSpeed40Mhz, Esp32VspiBus> DotStarEsp32DmaVspi40MhzMethod;
typedef DotStarEsp32DmaSpiMethod<SpiSpeed20Mhz, Esp32VspiBus> DotStarEsp32DmaVspi20MhzMethod;
@@ -303,7 +303,7 @@ typedef DotStarEsp32DmaSpiMethod<SpiSpeedHz, Esp32HspiBus> DotStarEsp32DmaHspiHz
typedef DotStarEsp32DmaHspi10MhzMethod DotStarEsp32DmaHspiMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
// Clock Speed and Default Definitions for DotStarEsp32DmaVspi2Bit
typedef DotStarEsp32DmaSpiMethod<SpiSpeed40Mhz,Esp32Vspi2BitBus> DotStarEsp32DmaVspi2Bit40MhzMethod;
typedef DotStarEsp32DmaSpiMethod<SpiSpeed20Mhz,Esp32Vspi2BitBus> DotStarEsp32DmaVspi2Bit20MhzMethod;
@@ -329,7 +329,7 @@ typedef DotStarEsp32DmaSpiMethod<SpiSpeedHz,Esp32Hspi2BitBus> DotStarEsp32DmaHsp
typedef DotStarEsp32DmaHspi2Bit10MhzMethod DotStarEsp32DmaHspi2BitMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
// Clock Speed and Default Definitions for DotStarEsp32DmaVspi4Bit
typedef DotStarEsp32DmaSpiMethod<SpiSpeed40Mhz,Esp32Vspi4BitBus> DotStarEsp32DmaVspi4Bit40MhzMethod;
typedef DotStarEsp32DmaSpiMethod<SpiSpeed20Mhz,Esp32Vspi4BitBus> DotStarEsp32DmaVspi4Bit20MhzMethod;
lib/NeoPixelBus/src/internal/Esp32_i2s.c
+8 -8
View File
@@ -21,7 +21,7 @@
// ESP32C3/S3 I2S is not supported yet due to significant changes to interface
#ifndef CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP // turn this off with something new from idf5.1
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C2)
#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C2)
#include <string.h>
#include <stdio.h>
@@ -113,7 +113,7 @@ typedef struct {
static uint8_t i2s_silence_buf[I2S_DMA_SILENCE_SIZE] = { 0 };
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// (I2S_NUM_MAX == 2)
static i2s_bus_t I2S[I2S_NUM_MAX] = {
{&I2S0, -1, -1, -1, -1, 0, NULL, NULL, i2s_silence_buf, I2S_DMA_SILENCE_SIZE, NULL, I2S_DMA_BLOCK_COUNT_DEFAULT, 0, 0, I2s_Is_Idle},
@@ -187,7 +187,7 @@ esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t d
typeof(i2s->clkm_conf) clkm_conf;
clkm_conf.val = 0;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
clkm_conf.clka_en = 0;
#else
clkm_conf.clk_sel = 2;
@@ -222,7 +222,7 @@ void i2sSetPins(uint8_t bus_num, int8_t out, bool invert) {
pinMode(out, OUTPUT);
int i2sSignal;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// (I2S_NUM_MAX == 2)
if (bus_num == 1) {
i2sSignal = I2S1O_DATA_OUT23_IDX;
@@ -268,7 +268,7 @@ void i2sInit(uint8_t bus_num,
return;
}
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// (I2S_NUM_MAX == 2)
if (bus_num) {
periph_module_enable(PERIPH_I2S1_MODULE);
@@ -310,7 +310,7 @@ void i2sInit(uint8_t bus_num,
lc_conf.out_eof_mode = 1;
i2s->lc_conf.val = lc_conf.val;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
i2s->pdm_conf.pcm2pdm_conv_en = 0;
i2s->pdm_conf.pdm2pcm_conv_en = 0;
#endif
@@ -341,7 +341,7 @@ void i2sInit(uint8_t bus_num,
i2s->fifo_conf.tx_fifo_mod_force_en = 1;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
i2s->pdm_conf.rx_pdm_en = 0;
i2s->pdm_conf.tx_pdm_en = 0;
#endif
@@ -351,7 +351,7 @@ void i2sInit(uint8_t bus_num,
// enable intr in cpu //
int i2sIntSource;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// (I2S_NUM_MAX == 2)
if (bus_num == 1) {
i2sIntSource = ETS_I2S1_INTR_SOURCE;
lib/NeoPixelBus/src/internal/Esp32_i2s.h
+1 -1
View File
@@ -4,7 +4,7 @@
#ifndef CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP // turn this off with something new from idf5.1
// ESP32C3 I2S is not supported yet due to significant changes to interface
#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2)
#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2)
#ifdef __cplusplus
extern "C" {
lib/NeoPixelBus/src/internal/NeoBusChannel.h
+1 -1
View File
@@ -12,7 +12,7 @@ enum NeoBusChannel
NeoBusChannel_0,
NeoBusChannel_1,
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
NeoBusChannel_2,
lib/NeoPixelBus/src/internal/NeoEsp32I2sMethod.h
+4 -4
View File
@@ -28,7 +28,7 @@ License along with NeoPixel. If not, see
#if ESP_IDF_VERSION_MAJOR <= 4
// ESP32C3 I2S is not supported yet due to significant changes to interface
#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if defined(ARDUINO_ARCH_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
extern "C"
{
@@ -305,7 +305,7 @@ typedef NeoEsp32I2sMethodBase<NeoEsp32I2sSpeed800Kbps, NeoEsp32I2sBusZero, NeoEs
typedef NeoEsp32I2sMethodBase<NeoEsp32I2sSpeed400Kbps, NeoEsp32I2sBusZero, NeoEsp32I2sInverted> NeoEsp32I2s0400KbpsInvertedMethod;
typedef NeoEsp32I2sMethodBase<NeoEsp32I2sSpeedApa106, NeoEsp32I2sBusZero, NeoEsp32I2sInverted> NeoEsp32I2s0Apa106InvertedMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// (I2S_NUM_MAX == 2)
typedef NeoEsp32I2sMethodBase<NeoEsp32I2sSpeedWs2812x, NeoEsp32I2sBusOne, NeoEsp32I2sNotInverted> NeoEsp32I2s1Ws2812xMethod;
@@ -347,7 +347,7 @@ typedef NeoEsp32I2sMethodBase<NeoEsp32I2sSpeedApa106, NeoEsp32I2sBusN, NeoEsp32I
#endif
#if !defined(NEOPIXEL_ESP32_RMT_DEFAULT) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(NEOPIXEL_ESP32_RMT_DEFAULT) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// I2s Bus 1 method is the default method for Esp32
// Esp32S2 & Esp32C3 will use RMT as the default allways
@@ -379,6 +379,6 @@ typedef NeoEsp32I2s1Apa106InvertedMethod NeoApa106InvertedMethod;
typedef NeoEsp32I2s1Ws2812xInvertedMethod Neo800KbpsInvertedMethod;
typedef NeoEsp32I2s1400KbpsInvertedMethod Neo400KbpsInvertedMethod;
#endif // !defined(NEOPIXEL_ESP32_RMT_DEFAULT) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#endif // !defined(NEOPIXEL_ESP32_RMT_DEFAULT) && !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#endif
#endif // ESP_IDF_VERSION_MAJOR < 5
lib/NeoPixelBus/src/internal/NeoEsp32RmtMethod.h
+8 -8
View File
@@ -454,7 +454,7 @@ public:
const static rmt_channel_t RmtChannelNumber = RMT_CHANNEL_3;
};
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32S2) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6)
class NeoEsp32RmtChannel4
{
@@ -658,7 +658,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedTx1812, NeoEsp32RmtChannel1> NeoEs
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811Method;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xMethod;
@@ -765,7 +765,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedTx1812, NeoEsp32RmtChannel
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsInvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsInvertedMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3)
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811InvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xInvertedMethod;
@@ -839,13 +839,13 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChanne
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3)
#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
// Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT
// will switch to use RMT as the default method
// The ESP32S2 & ESP32C3 will always defualt to RMT
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
// RMT channel 1 method is the default method for Esp32S2 & Esp32C3
typedef NeoEsp32Rmt1Ws2812xMethod NeoWs2813Method;
@@ -878,7 +878,7 @@ typedef NeoEsp32Rmt1Tx1812InvertedMethod NeoTx1812InvertedMethod;
typedef NeoEsp32Rmt1Ws2812xInvertedMethod Neo800KbpsInvertedMethod;
typedef NeoEsp32Rmt1400KbpsInvertedMethod Neo400KbpsInvertedMethod;
#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
// RMT channel 6 method is the default method for Esp32
typedef NeoEsp32Rmt6Ws2812xMethod NeoWs2813Method;
@@ -911,8 +911,8 @@ typedef NeoEsp32Rmt6Tx1812InvertedMethod NeoTx1812InvertedMethod;
typedef NeoEsp32Rmt6Ws2812xInvertedMethod Neo800KbpsInvertedMethod;
typedef NeoEsp32Rmt6400KbpsInvertedMethod Neo400KbpsInvertedMethod;
#endif // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#endif // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
#endif
lib/NeoPixelBus/src/internal/NeoEsp32RmtMethod_idf5.h
+10 -10
View File
@@ -421,7 +421,7 @@ public:
#ifndef NEOESP32_RMT_FLAGS_WITH_DMA
#if defined(CONFIG_IDF_TARGET_ESP32S3)
#define NEOESP32_RMT_FLAGS_WITH_DMA true
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
#define NEOESP32_RMT_FLAGS_WITH_DMA false
#else
#define NEOESP32_RMT_FLAGS_WITH_DMA false
@@ -442,7 +442,7 @@ public:
#elif defined(CONFIG_IDF_TARGET_ESP32S2)
// We use RMT channel 1, so we only can use upto 3x he default mem_block_symbols of 64
#define NEOESP32_RMT_MEM_BLOCK_SYMBOLS 192 // Use 3x platform default (Only ESP32 and ESP32-S2 have 64)
#elif defined(CONFIG_IDF_TARGET_ESP32C3)
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
#define NEOESP32_RMT_MEM_BLOCK_SYMBOLS 192
#else
#define NEOESP32_RMT_MEM_BLOCK_SYMBOLS 96 // Use 2x platform default
@@ -582,7 +582,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedTx1812, NeoEsp32RmtChannel1> NeoEs
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811Method;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xMethod;
@@ -653,7 +653,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed800Kbps, NeoEsp32RmtChannel7> NeoE
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtSpeed400Kbps, NeoEsp32RmtChannel7> NeoEsp32Rmt7400KbpsMethod;
#endif // !defined(CONFIG_IDF_TARGET_ESP32S2)
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C3)
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3)
// inverted
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2811, NeoEsp32RmtChannelN> NeoEsp32RmtNWs2811InvertedMethod;
@@ -689,7 +689,7 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedTx1812, NeoEsp32RmtChannel
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed800Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1800KbpsInvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChannel1> NeoEsp32Rmt1400KbpsInvertedMethod;
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C6)
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2811, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2811InvertedMethod;
typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeedWs2812x, NeoEsp32RmtChannel2> NeoEsp32Rmt2Ws2812xInvertedMethod;
@@ -763,13 +763,13 @@ typedef NeoEsp32RmtMethodBase<NeoEsp32RmtInvertedSpeed400Kbps, NeoEsp32RmtChanne
#endif // !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
#if defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6)
// Normally I2s method is the default, defining NEOPIXEL_ESP32_RMT_DEFAULT
// will switch to use RMT as the default method
// The ESP32S2 & ESP32C3 will always defualt to RMT
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6)
// RMT channel 1 method is the default method for Esp32S2 & Esp32C3
typedef NeoEsp32Rmt1Ws2812xMethod NeoWs2813Method;
@@ -802,7 +802,7 @@ typedef NeoEsp32Rmt1Tx1812InvertedMethod NeoTx1812InvertedMethod;
typedef NeoEsp32Rmt1Ws2812xInvertedMethod Neo800KbpsInvertedMethod;
typedef NeoEsp32Rmt1400KbpsInvertedMethod Neo400KbpsInvertedMethod;
#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3)
#else // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5)
#if defined(CONFIG_IDF_TARGET_ESP32S3)
@@ -873,8 +873,8 @@ typedef NeoEsp32Rmt6400KbpsInvertedMethod Neo400KbpsInvertedMethod;
#endif // defined(CONFIG_IDF_TARGET_ESP32S3)
#endif // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
#endif // defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6)
#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6)
#endif // defined(NEOPIXEL_ESP32_RMT_DEFAULT) || defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C6)
#endif
lib/NeoPixelBus/src/internal/NeoEsp32SpiMethod_idf5.h
+1 -1
View File
@@ -30,7 +30,7 @@ License along with NeoPixel. If not, see
#if defined(ARDUINO_ARCH_ESP32) && ESP_IDF_VERSION_MAJOR >= 5
#if (defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)) && !defined(HSPI_HOST)
#if (defined(CONFIG_IDF_TARGET_ESP32C5) || defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6)) && !defined(HSPI_HOST)
// HSPI_HOST depreciated in C3
#define HSPI_HOST SPI2_HOST
#endif
lib/NeoPixelBus/src/internal/NeoEspBitBangMethod.cpp
+1 -1
View File
@@ -29,7 +29,7 @@ License along with NeoPixel. If not, see
#include <Arduino.h>
// ESP32C3 I2S is not supported yet
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(CONFIG_IDF_TARGET_ESP32C5) && !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6)
#if !defined(ARDUINO_ARCH_ESP8266)
#include "soc/gpio_periph.h"
#endif
platformio.ini
+4 -1
View File
@@ -22,16 +22,19 @@ extra_configs =
platformio_esp82xx_envs.ini
platformio_esp32_envs.ini
platformio_esp32_solo1.ini
platformio_esp32c3_envs.ini
platformio_esp32s2_envs.ini
platformio_esp32s3_envs.ini
platformio_special_envs.ini
platformio_esp32c2_envs.ini
platformio_esp32c3_envs.ini
platformio_esp32c5_envs.ini
platformio_esp32c6_envs.ini
;default_envs = normal_ESP32_4M
default_envs = max_ESP32_16M8M_LittleFS_ETH
;default_envs = max_ESP32c5_8M1M_LittleFS_CDC_ETH
;default_envs = normal_ESP32c6_4M316k_LittleFS_CDC
; default_envs = custom_ESP8266_4M1M
platformio_core_defs.ini
+36 -4
View File
@@ -195,10 +195,12 @@ lib_extra_dirs =
lib/lib_ssl
; ESP_IDF 5.3.1
[core_esp32_IDF5_3_2__3_1_0_LittleFS]
platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF54
platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/3538/framework-arduinoespressif32-all-release_v5.4-8f5ad6d7.zip
; ESP_IDF 5.4.1
[core_esp32_IDF5_4_1__3_2_0_LittleFS]
;platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF54
;platform_packages = framework-arduinoespressif32 @ https://github.com/Jason2866/esp32-arduino-lib-builder/releases/download/3538/framework-arduinoespressif32-all-release_v5.4-8f5ad6d7.zip
platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF55
platform_packages =
build_flags = -DESP32_STAGE
-DESP_IDF_VERSION_MAJOR=5
-DLIBRARIES_NO_LOG=1
@@ -223,6 +225,36 @@ lib_ignore =
lib_extra_dirs =
lib/lib_ssl
; ESP_IDF 5.5.0
[core_esp32_IDF5_5_0__3_2_0_LittleFS]
platform = https://github.com/Jason2866/platform-espressif32.git#Arduino/IDF55
platform_packages =
build_flags = -DESP32_STAGE
-DESP_IDF_VERSION_MAJOR=5
-DLIBRARIES_NO_LOG=1
-DDISABLE_SC16IS752_SPI
; -DCONFIG_PM_ENABLE=0
-DETH_TYPE_JL1101_SUPPORTED
; PR_9453_FLUSH_TO_CLEAR_REVERTED
-DPR_9453_FLUSH_TO_CLEAR=clear
; -DCONFIG_LWIP_L2_TO_L3_COPY
; -DETH_SPI_SUPPORTS_NO_IRQ=1
-DCONFIG_FREERTOS_USE_TICKLESS_IDLE=1
-DCONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP=3
-DNEOPIXEL_ESP32_RMT_DEFAULT
-DCRON_USE_LOCAL_TIME
-I$PROJECT_DIR/src/include
-include "sdkconfig.h"
-include "ESPEasy_config.h"
-include "esp32x_fixes.h"
-DUPDATE_NOCRYPT
; -Wnull-dereference
lib_ignore =
lib_extra_dirs =
lib/lib_ssl
; Regarding the define PR_9453_FLUSH_TO_CLEAR
; See:
; https://github.com/espressif/arduino-esp32/pull/8871/files
platformio_esp32_envs.ini
+42 -4
View File
@@ -36,7 +36,7 @@ lib_ignore =
[esp32_base_idf5]
extends = common, core_esp32_IDF5_3_2__3_1_0_LittleFS
extends = common, core_esp32_IDF5_4_1__3_2_0_LittleFS
upload_speed = 460800
upload_before_reset = default_reset
upload_after_reset = hard_reset
@@ -55,7 +55,7 @@ extra_scripts = pre:tools/pio/pre_esp32.py
; However LTO cannot optimize builds with text section literals and thus will result in quite a lot larger builds (80k - 140k larger)
build_unflags = -Wall
-fno-lto
build_flags = ${core_esp32_IDF5_3_2__3_1_0_LittleFS.build_flags}
build_flags = ${core_esp32_IDF5_4_1__3_2_0_LittleFS.build_flags}
; ${mqtt_flags.build_flags}
-DMQTT_MAX_PACKET_SIZE=2048
-DCONFIG_FREERTOS_ASSERT_DISABLE
@@ -69,7 +69,45 @@ build_flags = ${core_esp32_IDF5_3_2__3_1_0_LittleFS.build_flags}
-DLWIP_IPV6=1
monitor_filters = esp32_exception_decoder
lib_ignore =
${core_esp32_IDF5_3_2__3_1_0_LittleFS.lib_ignore}
${core_esp32_IDF5_4_1__3_2_0_LittleFS.lib_ignore}
[esp32_base_idf5_5]
extends = common, core_esp32_IDF5_5_0__3_2_0_LittleFS
upload_speed = 460800
upload_before_reset = default_reset
upload_after_reset = hard_reset
extra_scripts = pre:tools/pio/pre_esp32.py
post:tools/pio/post_esp32.py
${extra_scripts_default.extra_scripts}
post:tools/pio/copy_files.py
; you can disable debug linker flag to reduce binary size (comment out line below), but the backtraces will become less readable
; tools/pio/extra_linker_flags.py
; fix the platform package to use gcc-ar and gcc-ranlib to enable lto linker plugin
; more detail: https://embeddedartistry.com/blog/2020/04/13/prefer-gcc-ar-to-ar-in-your-buildsystems/
; pre:tools/pio/apply_patches.py
; When using LTO, make sure NOT to use -mtext-section-literals
; -mtext-section-literals may be required when building large builds
; However LTO cannot optimize builds with text section literals and thus will result in quite a lot larger builds (80k - 140k larger)
build_unflags = -Wall
-fno-lto
build_flags = ${core_esp32_IDF5_5_0__3_2_0_LittleFS.build_flags}
; ${mqtt_flags.build_flags}
-DMQTT_MAX_PACKET_SIZE=2048
-DCONFIG_FREERTOS_ASSERT_DISABLE
-DCONFIG_LWIP_ESP_GRATUITOUS_ARP
-fno-strict-aliasing
-flto=auto
-Wswitch
-DCORE_DEBUG_LEVEL=ARDUHAL_LOG_LEVEL_NONE
; -DCORE_DEBUG_LEVEL=ARDUHAL_LOG_LEVEL_INFO
; -DCORE_DEBUG_LEVEL=ARDUHAL_LOG_LEVEL_VERBOSE
-DLWIP_IPV6=1
-DCONFIG_BT_NIMBLE_NVS_PERSIST=y
monitor_filters = esp32_exception_decoder
lib_ignore =
${core_esp32_IDF5_5_0__3_2_0_LittleFS.lib_ignore}
; -flto cannot be used for ESP32 C3!
@@ -120,7 +158,7 @@ board_build.filesystem = littlefs
lib_ignore = ${esp32_always.lib_ignore}
ESP32_ping
ESP32 BLE Arduino
${core_esp32_IDF5_3_2__3_1_0_LittleFS.lib_ignore}
${core_esp32_IDF5_4_1__3_2_0_LittleFS.lib_ignore}
[esp32_IRExt]
platformio_esp32c5_envs..ini
+29
View File
@@ -0,0 +1,29 @@
[esp32c5_common_LittleFS]
extends = esp32_base_idf5
build_flags = ${esp32_base_idf5.build_flags}
-DFEATURE_ARDUINO_OTA=1
-DUSE_LITTLEFS
-DESP32C5
extra_scripts = ${esp32_base_idf5.extra_scripts}
build_unflags = ${esp32_base_idf5.build_unflags}
-fexceptions
board_build.filesystem = littlefs
lib_ignore = ${esp32_base_idf5.lib_ignore}
board = esp32c5cdc
[env:max_ESP32c5_8M1M_LittleFS_CDC_ETH]
extends = esp32c5_common_LittleFS
board = esp32c5cdc-8M
build_flags = ${esp32c5_common_LittleFS.build_flags}
-DFEATURE_ETHERNET=1
-DFEATURE_ARDUINO_OTA=1
-DPLUGIN_BUILD_MAX_ESP32
-DPLUGIN_BUILD_IR_EXTENDED
-D ST7789_EXTRA_INIT=1
-D P116_EXTRA_ST7789=1
extra_scripts = ${esp32c5_common_LittleFS.extra_scripts}
src/include/ESPEasy_config.h
+1 -1
View File
@@ -149,7 +149,7 @@ constexpr unsigned CEIL_LOG2(unsigned x)
# endif // ifdef ESP8266
# ifdef ESP32
# if defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6)
# if defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6)
// (ESP32) FsP: FlashstringHelper to String-Pointer
# define FsP
src/include/esp32x_fixes.h
+1 -1
View File
@@ -87,7 +87,7 @@
# endif // REG_SPI_BASE
# endif // ESP_IDF_VERSION_MAJOR < 5
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
# define SPI_HOST SPI1_HOST
# define HSPI_HOST SPI2_HOST
# define VSPI_HOST SPI2_HOST /* No SPI3_host on C2/C6 */
src/src/CustomBuild/ESPEasy_buildinfo.h
+7 -1
View File
@@ -34,8 +34,14 @@
# define BUILD_NOTES " - Mega32-s2"
#elif defined(ESP32S3)
# define BUILD_NOTES " - Mega32-s3"
#elif defined(ESP32H2)
# define BUILD_NOTES " - Mega32-h2"
#elif defined(ESP32P4)
# define BUILD_NOTES " - Mega32-p4"
#elif defined(ESP32C6)
# define BUILD_NOTES " - Mega32-c6"
#elif defined(ESP32C5)
# define BUILD_NOTES " - Mega32-c5"
#elif defined(ESP32C3)
# define BUILD_NOTES " - Mega32-c3"
#elif defined(ESP32C2)
@@ -66,7 +72,7 @@
CONFIG_IDF_TARGET_ESP32S2 || // support USB via USBCDC
CONFIG_IDF_TARGET_ESP32S3 // support USB via HWCDC using JTAG interface or USBCDC
*/
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
# if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
// #if CONFIG_TINYUSB_CDC_ENABLED // This define is not recognized here so use USE_USB_CDC_CONSOLE
# ifdef USE_USB_CDC_CONSOLE
src/src/CustomBuild/define_plugin_sets.h
+1 -1
View File
@@ -3477,7 +3477,7 @@ To create/register a plugin, you have to :
#ifndef FEATURE_SET_WIFI_TX_PWR
#ifdef ESP32
#if defined(ESP32S2) || defined(ESP32S3) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6)
#if defined(ESP32S2) || defined(ESP32S3) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6)
#define FEATURE_SET_WIFI_TX_PWR 1
#else
// TD-er: Disable setting TX power on ESP32 as it seems to cause issues on IDF4.4
src/src/DataStructs/WiFi_AP_Candidate.cpp
+17 -1
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@@ -115,6 +115,10 @@ WiFi_AP_Candidate::WiFi_AP_Candidate(uint8_t networkItem) : index(0) {
bits.phy_11ax = it->phy_11ax;
bits.ftm_initiator = it->ftm_initiator;
bits.ftm_responder = it->ftm_responder;
#ifdef ESP32C5
bits.phy_11a = it->phy_11a;
bits.phy_11ac = it->phy_11ac;
#endif
# endif // if ESP_IDF_VERSION_MAJOR >= 5
bits.wps = it->wps;
@@ -252,6 +256,14 @@ String WiFi_AP_Candidate::toString(const String& separator) const {
separator.c_str(),
channel);
#ifdef ESP32C5
if (channel < 36) {
result += F(" 2.4 GHz");
} else {
result += F(" 5 GHz");
}
#endif
if (rssi == -1) {
result += F(" (RTC) ");
} else {
@@ -292,7 +304,6 @@ String WiFi_AP_Candidate::toString(const String& separator) const {
if (bits.phy_11n) { phy_str += 'n'; }
#ifdef ESP32
if (bits.phy_11ax) { phy_str += F("/ax"); }
if (bits.phy_lr) { phy_str += F("/lr"); }
@@ -300,6 +311,11 @@ String WiFi_AP_Candidate::toString(const String& separator) const {
if (bits.ftm_initiator) { phy_str += F("/FTM_i"); }
if (bits.ftm_responder) { phy_str += F("/FTM_r"); }
// Add 5 GHz WiFi types as last in the list.
if (bits.phy_11a) { phy_str += F("/a"); }
if (bits.phy_11ac) { phy_str += F("/ac"); }
#endif // ifdef ESP32
if (phy_str.length()) {
src/src/DataStructs/WiFi_AP_Candidate.h
+4 -2
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@@ -93,12 +93,14 @@ struct WiFi_AP_Candidate {
uint16_t phy_11g : 1;
uint16_t phy_11n : 1;
uint16_t phy_lr : 1;
uint16_t phy_11ax : 1;
uint16_t phy_11a : 1; // traditional (old) 5 GHz
uint16_t phy_11ac : 1; // 5 GHz WiFi 5, 802.11ac
uint16_t phy_11ax : 1; // WiFi 6, both bands possible
uint16_t wps : 1;
uint16_t ftm_responder : 1;
uint16_t ftm_initiator : 1;
uint16_t unused : 5;
uint16_t unused : 3;
} bits;
uint16_t _allBits;
src/src/DataStructs_templ/SettingsStruct.cpp
+1 -1
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@@ -743,7 +743,7 @@ bool SettingsStruct_tmpl<N_TASKS>::getPinBootStateIndex(
index_high = gpio_pin - maxStates;
# if defined(ESP32_CLASSIC) || defined(ESP32C2) || defined(ESP32C3)|| defined(ESP32C6)
# if defined(ESP32_CLASSIC) || defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C5) || defined(ESP32C6)
// These can all store in the PinBootStates_ESP32 array
return (index_high < maxStatesesp32);
src/src/DataTypes/SPI_options.cpp
+2
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@@ -42,6 +42,8 @@
#define VSPI_FSPI_SHORT_STRING "FSPI"
# elif CONFIG_IDF_TARGET_ESP32C3 // ESP32-C3
#define VSPI_FSPI_SHORT_STRING "SPI"
# elif CONFIG_IDF_TARGET_ESP32C5 // ESP32-C5
#define VSPI_FSPI_SHORT_STRING "FSPI"
# elif CONFIG_IDF_TARGET_ESP32C6 // ESP32-C6
#define VSPI_FSPI_SHORT_STRING "FSPI"
# elif CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
src/src/DataTypes/SPI_options.h
+4
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@@ -51,6 +51,10 @@
#define VSPI_FSPI_SCK 21
#define VSPI_FSPI_MISO 20
#define VSPI_FSPI_MOSI 19
# elif CONFIG_IDF_TARGET_ESP32C5 // ESP32-C5
#define VSPI_FSPI_SCK 4
#define VSPI_FSPI_MISO 5
#define VSPI_FSPI_MOSI 6
# elif CONFIG_IDF_TARGET_ESP32C3 // ESP32-C3
#define VSPI_FSPI_SCK 4
#define VSPI_FSPI_MISO 5
src/src/ESPEasyCore/ESPEasyWifi.cpp
+3
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@@ -379,7 +379,10 @@ void WifiScan(bool async, uint8_t channel) {
# ifdef ESP32
const bool passive = Settings.PassiveWiFiScan();
const uint32_t max_ms_per_chan = 120;
#ifndef ESP32C5
// C5 scans both 2.4 and 5 GHz band, which takes much longer
WiFi.setScanTimeout(14 * max_ms_per_chan * 2);
#endif
WiFi.scanNetworks(async, show_hidden, passive, max_ms_per_chan /*, channel */);
# endif // ifdef ESP32
src/src/ESPEasyCore/ESPEasyWifi_abstracted_ESP32.cpp
+21 -4
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@@ -295,14 +295,19 @@ void setConnectionSpeed(bool ForceWiFi_bg_mode) {
// The response speed and stability is better at HT20 for ESP units.
esp_wifi_set_bandwidth(WIFI_IF_STA, WIFI_BW_HT20);
uint8_t protocol = WIFI_PROTOCOL_11B | WIFI_PROTOCOL_11G; // Default to BG
// uint8_t protocol = WIFI_PROTOCOL_11B | WIFI_PROTOCOL_11G; // Default to BG
uint8_t protocol = 0;
if (!ForceWiFi_bg_mode || (WiFiEventData.connectionFailures > 10)) {
// Set to use BGN
protocol |= WIFI_PROTOCOL_11N;
# ifdef ESP32C6
# if defined(ESP32C5) || defined(ESP32C6)
protocol |= WIFI_PROTOCOL_11AX;
# endif
#ifdef ESP32C5
protocol |= WIFI_PROTOCOL_11A;
protocol |= WIFI_PROTOCOL_11AC;
#endif
}
const WiFi_AP_Candidate candidate = WiFi_AP_Candidates.getCurrent();
@@ -316,13 +321,25 @@ void setConnectionSpeed(bool ForceWiFi_bg_mode) {
protocol |= WIFI_PROTOCOL_11N;
addLog(LOG_LEVEL_INFO, F("WIFI : AP is set to 802.11n only"));
}
# ifdef ESP32C6
# if defined(ESP32C5) || defined(ESP32C6)
if (candidate.bits.phy_11ax) {
// Set to use WiFi6
protocol |= WIFI_PROTOCOL_11AX;
addLog(LOG_LEVEL_INFO, F("WIFI : AP is set to 802.11ax"));
addLog(LOG_LEVEL_INFO, F("WIFI : AP allows 802.11ax, Wi-Fi 6"));
}
#ifdef ESP32C5
if (candidate.bits.phy_11a) {
// Set to use 5 GHz WiFi
protocol |= WIFI_PROTOCOL_11A;
addLog(LOG_LEVEL_INFO, F("WIFI : AP allows 802.11a, 5 GHz"));
}
if (candidate.bits.phy_11ac) {
// Set to use 5 GHz WiFi-5
protocol |= WIFI_PROTOCOL_11AC;
addLog(LOG_LEVEL_INFO, F("WIFI : AP allows 802.11ac, 5 GHz Wi-Fi 5"));
}
#endif
# endif // ifdef ESP32C6
}
}
src/src/Helpers/ESPEasy_Storage.cpp
+3 -2
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@@ -17,6 +17,7 @@
#include "../ESPEasyCore/ESPEasy_Log.h"
#include "../ESPEasyCore/ESPEasyNetwork.h"
#include "../ESPEasyCore/ESPEasyWifi.h"
#include "../ESPEasyCore/ESPEasyWifi_abstracted.h"
#include "../ESPEasyCore/Serial.h"
#include "../Globals/CRCValues.h"
@@ -679,7 +680,7 @@ bool check_and_update_WiFi_Calibration() {
bool Erase_WiFi_Calibration() {
#ifdef ESP8266
WifiDisconnect();
setWifiMode(WIFI_OFF);
ESPEasy::net::wifi::setWifiMode(WIFI_OFF);
if (!ESP.eraseConfig())
return false;
#ifndef BUILD_MINIMAL_OTA
@@ -689,7 +690,7 @@ bool Erase_WiFi_Calibration() {
#ifdef ESP32
WifiDisconnect();
setWifiMode(WIFI_OFF);
ESPEasy::net::wifi::setWifiMode(WIFI_OFF);
// Make sure power is stable, so wait a bit longer
delay(1000);
esp_phy_erase_cal_data_in_nvs();
src/src/Helpers/Hardware.cpp
+26
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@@ -444,6 +444,8 @@ int getCPU_MaxFreqMHz()
return 160;
#elif CONFIG_IDF_TARGET_ESP32C6
return 160;
#elif CONFIG_IDF_TARGET_ESP32C5
return 240;
#elif CONFIG_IDF_TARGET_ESP32H2
//IDF-6570
return 96;
@@ -673,6 +675,30 @@ void readBootCause() {
case POWER_GLITCH_RESET : lastBootCause = BOOT_CAUSE_POWER_UNSTABLE; break; /**<23, power glitch reset digital core and rtc module*/
}
#elif defined(ESP32C5)
switch (rtc_get_reset_reason(0)) {
case NO_MEAN : break;
case POWERON_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<1, Vbat power on reset*/
case RTC_SW_SYS_RESET : lastBootCause = BOOT_CAUSE_SOFT_RESTART; break; /**<3, Software reset digital core*/
case DEEPSLEEP_RESET : lastBootCause = BOOT_CAUSE_DEEP_SLEEP; break; /**<5, Deep Sleep reset digital core*/
// case SDIO_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<6, Reset by SLC module, reset digital core (hp system)*/
case TG0WDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<7, Timer Group0 Watch dog reset digital core*/
case TG1WDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<8, Timer Group1 Watch dog reset digital core*/
case RTCWDT_SYS_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<9, RTC Watch dog Reset digital core*/
case TG0WDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<11, Time Group0 reset CPU*/
case RTC_SW_CPU_RESET : lastBootCause = BOOT_CAUSE_SOFT_RESTART; break; /**<12, Software reset CPU*/
case RTCWDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<13, RTC Watch dog Reset CPU*/
case RTCWDT_BROWN_OUT_RESET : lastBootCause = BOOT_CAUSE_POWER_UNSTABLE; break; /**<15, Reset when the vdd voltage is not stable*/
case RTCWDT_RTC_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<16, RTC Watch dog reset digital core and rtc module*/
case TG1WDT_CPU_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<17, Time Group1 reset CPU*/
case SUPER_WDT_RESET : lastBootCause = BOOT_CAUSE_EXT_WD; break; /**<18, super watchdog reset digital core and rtc module*/
case EFUSE_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<20, efuse reset digital core*/
case USB_UART_CHIP_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<21, usb uart reset digital core */
case USB_JTAG_CHIP_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<22, usb jtag reset digital core */
case JTAG_RESET : lastBootCause = BOOT_CAUSE_MANUAL_REBOOT; break; /**<24, jtag reset CPU*/
}
#elif defined(ESP32C6)
switch (rtc_get_reset_reason(0)) {
case NO_MEAN : break;
src/src/Helpers/Hardware_ADC_cali.h
+1 -1
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@@ -18,7 +18,7 @@
# include <driver/adc.h>
# endif // if ESP_IDF_VERSION_MAJOR >= 5
# if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
# if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C6
/**
* On ESP32C3, ADC2 is no longer supported, due to its HW limitation.
* Search for errata on espressif website for more details.
src/src/Helpers/Hardware_GPIO_ESP32C5.cpp
+166
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@@ -0,0 +1,166 @@
#include "../Helpers/Hardware_GPIO.h"
#ifdef ESP32C5
# include <driver/gpio.h>
# include "../Helpers/Hardware_device_info.h"
// ********************************************************************************
// Get info of a specific GPIO pin
// ********************************************************************************
bool getGpioInfo(int gpio, int& pinnr, bool& input, bool& output, bool& warning) {
pinnr = -1; // ESP32 does not label the pins, they just use the GPIO number.
input = GPIO_IS_VALID_GPIO(gpio);
output = GPIO_IS_VALID_OUTPUT_GPIO(gpio);
warning = isBootStrapPin(gpio);
if (!(GPIO_IS_VALID_GPIO(gpio))) { return false; }
// FIXME TD-er: Implement for ESP32-C5
// See:
// - https://docs.espressif.com/projects/esp-idf/en/v5.0/esp32c3/hw-reference/esp32c3/user-guide-devkitm-1.html
// - https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/api-reference/peripherals/gpio.html
// Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf
if (gpio == 11) {
if (getChipFeatures().embeddedFlash /* || !flashVddPinCanBeUsedAsGPIO() */) {
// See: https://www.letscontrolit.com/forum/viewtopic.php?p=71880#p71874
//
// By default VDD_SPI is the power supply pin for embedded flash or external flash.
// It can only be used as GPIO11 only when the chip is connected to an
// external flash, and this flash is powered by an external power supply
input = false;
output = false;
}
warning = true;
}
if (isFlashInterfacePin_ESPEasy(gpio)) {
if (getChipFeatures().embeddedFlash) {
// Connected to the integrated SPI flash.
input = false;
output = false;
} else {
// See: https://www.letscontrolit.com/forum/viewtopic.php?p=71880#p71874
if ((gpio == 12) || (gpio == 13)) {
// SPIHD/GPIO12
// SPIWP/GPIO13
if ((ESP.getFlashChipMode() != FM_DOUT) &&
(ESP.getFlashChipMode() != FM_DIO)) {
input = false;
output = false;
}
}
}
warning = true;
}
if ((gpio == PIN_USB_D_MIN) || (gpio == PIN_USB_D_PLUS)) {
// USB OTG and USB Serial/JTAG function. USB signal is a differential
// signal transmitted over a pair of D+ and D- wires.
warning = true;
}
// GPIO 18: USB_D-
// GPIO 19: USB_D+
// GPIO 20: U0RXD
// GPIO 21: U0TXD
return (input || output);
}
bool isBootStrapPin(int gpio)
{
if (gpio == 2) {
// Strapping pin which must be high during boot
return true;
}
if (gpio == 8) {
// Strapping pin which must be high during flashing
return true;
}
if (gpio == 9) {
// Strapping pin to force download mode (like GPIO-0 on ESP8266/ESP32-classic)
return true;
}
return false;
}
bool getGpioPullResistor(int gpio, bool& hasPullUp, bool& hasPullDown) {
hasPullDown = false;
hasPullUp = false;
if (validGpio(gpio)) {
hasPullUp = true;
hasPullDown = true;
}
return true;
}
bool validGpio(int gpio) {
if (!GPIO_IS_VALID_GPIO(gpio)) { return false; }
int pinnr;
bool input;
bool output;
bool warning;
return getGpioInfo(gpio, pinnr, input, output, warning);
}
// Get ADC related info for a given GPIO pin
// @param gpio_pin GPIO pin number
// @param adc Number of ADC unit (0 == Hall effect)
// @param ch Channel number on ADC unit
// @param t index of touch pad ID
bool getADC_gpio_info(int gpio_pin, int& adc, int& ch, int& t)
{
adc = -1;
ch = -1;
t = -1;
if ((gpio_pin >= 0) && (gpio_pin <= 4)) {
adc = 1;
ch = gpio_pin;
return true;
}
# if ESP_IDF_VERSION_MAJOR >= 5
// Support for ADC2 has been dropped.
# else // if ESP_IDF_VERSION_MAJOR >= 5
if (gpio_pin == 5) {
adc = 2;
ch = 0;
return true;
}
# endif // if ESP_IDF_VERSION_MAJOR >= 5
return false;
}
#if SOC_TOUCH_SENSOR_SUPPORTED
int touchPinToGpio(int touch_pin)
{
// No touch pin support
return -1;
}
#endif
#if SOC_DAC_SUPPORTED
// Get DAC related info for a given GPIO pin
// @param gpio_pin GPIO pin number
// @param dac Number of DAC unit
bool getDAC_gpio_info(int gpio_pin, int& dac)
{
// ESP32-C5, ESP32-S3, ESP32-C2, ESP32-C6 and ESP32-H2 don't have a DAC onboard
return false;
}
#endif
#endif // ifdef ESP32C5
src/src/Helpers/Hardware_defines.h
+11 -1
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@@ -55,7 +55,7 @@
# define WIFI_SENSITIVITY_11b -88
# define WIFI_SENSITIVITY_54g -76
# define WIFI_SENSITIVITY_n -72
#elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6)
#elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6)
# define MAX_TX_PWR_DBM_11b 21.0f
# define MAX_TX_PWR_DBM_54g 19.0f
# define MAX_TX_PWR_DBM_n 18.5f
@@ -81,6 +81,8 @@ static_assert(false, "Implement processor architecture");
# define SOC_RX0 44
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_RX0 17
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_RX0 12
# elif CONFIG_IDF_TARGET_ESP32C3
# define SOC_RX0 20
# elif CONFIG_IDF_TARGET_ESP32C2
@@ -97,6 +99,8 @@ static_assert(false, "Implement processor architecture");
# define SOC_TX0 43
# elif CONFIG_IDF_TARGET_ESP32C6
# define SOC_TX0 16
# elif CONFIG_IDF_TARGET_ESP32C5
# define SOC_TX0 11
# elif CONFIG_IDF_TARGET_ESP32C3
# define SOC_TX0 21
# elif CONFIG_IDF_TARGET_ESP32C2
@@ -114,6 +118,9 @@ static_assert(false, "Implement processor architecture");
#ifdef ESP32C6
#define PIN_USB_D_MIN 12
#endif
#ifdef ESP32C5
#define PIN_USB_D_MIN 13
#endif
#ifdef ESP32C3
#define PIN_USB_D_MIN 18
#endif
@@ -127,6 +134,9 @@ static_assert(false, "Implement processor architecture");
#ifdef ESP32C6
#define PIN_USB_D_PLUS 13
#endif
#ifdef ESP32C5
#define PIN_USB_D_PLUS 14
#endif
#ifdef ESP32C3
#define PIN_USB_D_PLUS 19
#endif
src/src/Helpers/Hardware_device_info_ESP32C5.cpp
+69 -8
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@@ -2,17 +2,78 @@
#ifdef ESP32C5
# include <soc/soc.h>
# include <soc/efuse_reg.h>
# include <soc/spi_reg.h>
# include <soc/spi_pins.h>
# include <soc/rtc.h>
# include <esp_chip_info.h>
# include <bootloader_common.h>
bool isFlashInterfacePin_ESPEasy(int gpio) {
// FIXME TD-er: Must know whether we have internal or external flash
// For chip variants with an in-package flash, this pin can not be used.
switch (gpio) {
case MSPI_IOMUX_PIN_NUM_HD:
case MSPI_IOMUX_PIN_NUM_WP:
case MSPI_IOMUX_PIN_NUM_CS0:
case MSPI_IOMUX_PIN_NUM_CLK:
case MSPI_IOMUX_PIN_NUM_MOSI:
case MSPI_IOMUX_PIN_NUM_MISO:
return true;
}
return false;
// return (gpio) >= 24 && (gpio) <= 30 && gpio != 27;
}
bool flashVddPinCanBeUsedAsGPIO()
{
return false;
}
int32_t getEmbeddedFlashSize()
{
/*
// See: framework-arduinoespressif32\tools\esp32-arduino-libs\esp32c5\include\soc\esp32c5\include\soc\efuse_reg.h
const uint32_t flash_cap = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_4_REG, EFUSE_FLASH_CAP);
// FIXME TD-er: No idea about meaning of values
switch (flash_cap) {
case 0: return 0;
case 1: return 4;
case 2: return 2;
case 3: return 1;
case 4: return 8;
}
// Unknown value, thus mark as negative value
return -1 * static_cast<int32_t>(flash_cap);
*/
return 8;
}
int32_t getEmbeddedPSRAMSize()
{
// Doesn't have PSRAM
return 0;
}
# ifndef isPSRAMInterfacePin
bool isPSRAMInterfacePin(int gpio) {
return false;
}
# endif // ifndef isPSRAMInterfacePin
const __FlashStringHelper* getChipModel(uint32_t chip_model, uint32_t chip_revision, uint32_t pkg_version, bool single_core)
{
if (17 == chip_model) { // ESP32-C5 beta3 (MPW)
return F("ESP32-C5 beta3");
}
else if (23 == chip_model) { // ESP32-C5 MP
return F("ESP32-C5");
}
return F("Unknown");
return F("ESP32-C5");
}
#endif // ifdef ESP32C5
src/src/Helpers/Hardware_temperature_sensor.cpp
+2 -2
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@@ -17,7 +17,7 @@
extern "C" {
uint8_t temprature_sens_read();
}
# elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6) || defined(ESP32S2) || defined(ESP32S3)
# elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6) || defined(ESP32S2) || defined(ESP32S3)
# if ESP_IDF_VERSION_MAJOR < 5
# include <driver/temp_sensor.h>
@@ -62,7 +62,7 @@ esp_err_t do_read_internal_temperature(float& celsius) {
return result;
}
# elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C6) || defined(ESP32S2) || defined(ESP32S3)
# elif defined(ESP32C2) || defined(ESP32C3) || defined(ESP32C5) || defined(ESP32C6) || defined(ESP32S2) || defined(ESP32S3)
esp_err_t do_read_internal_temperature(float& celsius) {
esp_err_t result = ESP_FAIL;
src/src/Helpers/StringGenerator_GPIO.cpp
+3
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@@ -195,6 +195,9 @@ const __FlashStringHelper* getConflictingUse(int gpio, PinSelectPurpose purpose,
// See Appendix A, page 71: https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf
#elif defined(ESP32C5)
// TODO TD-er: Must check if C5 has conflicts here
#elif defined(ESP32C6)
if (gpio == 27) {
src/src/Helpers/StringGenerator_System.cpp
+28
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@@ -19,6 +19,8 @@
#include <esp32c2/rom/rtc.h>
#elif defined(ESP32C3)
#include <esp32c3/rom/rtc.h>
#elif defined(ESP32C5)
#include <esp32c5/rom/rtc.h>
#elif defined(ESP32C6)
#include <esp32c6/rom/rtc.h>
# elif defined(ESP32_CLASSIC)
@@ -177,6 +179,32 @@ const __FlashStringHelper * getResetReasonString_f(uint8_t icore, bool& isDEEPSL
case POWER_GLITCH_RESET : return F("power glitch reset digital core and rtc module");
}
#elif defined(ESP32C5)
// See tools\sdk\esp32\include\esp_rom\include\esp32c6\rom\rtc.h
switch (rtc_get_reset_reason(icore)) {
case NO_MEAN : break;
case POWERON_RESET : return F("Vbat power on reset");
case RTC_SW_SYS_RESET : return F("Software reset digital core (hp system)");
case DEEPSLEEP_RESET : isDEEPSLEEP_RESET = true; break;
//case DEEPSLEEP_RESET : return F("Deep Sleep reset digital core (hp system)");
// case SDIO_RESET : return F("Reset by SLC module, reset digital core (hp system)");
case TG0WDT_SYS_RESET : return F("Timer Group0 Watch dog reset digital core (hp system)");
case TG1WDT_SYS_RESET : return F("Timer Group1 Watch dog reset digital core (hp system)");
case RTCWDT_SYS_RESET : return F("RTC Watch dog Reset digital core (hp system)");
case TG0WDT_CPU_RESET : return F("Time Group0 reset CPU");
case RTC_SW_CPU_RESET : return F("Software reset CPU");
case RTCWDT_CPU_RESET : return F("RTC Watch dog Reset CPU");
case RTCWDT_BROWN_OUT_RESET : return F("Reset when the vdd voltage is not stable");
case RTCWDT_RTC_RESET : return F("RTC Watch dog reset digital core and rtc module");
case TG1WDT_CPU_RESET : return F("Time Group1 reset CPU");
case SUPER_WDT_RESET : return F("super watchdog reset digital core and rtc module");
case EFUSE_RESET : return F("efuse reset digital core (hp system)");
case USB_UART_CHIP_RESET : return F("usb uart reset digital core (hp system)");
case USB_JTAG_CHIP_RESET : return F("usb jtag reset digital core (hp system)");
case JTAG_RESET : return F("jtag reset CPU");
}
#elif defined(ESP32C6)
// See tools\sdk\esp32\include\esp_rom\include\esp32c6\rom\rtc.h
tools/pio/copy_files.py
+6 -2
View File
@@ -21,11 +21,11 @@ def get_max_bin_size(env_name, file_suffix):
if "4M316k" in env_name or "_ESP32_4M2M" in env_name:
# ESP32 with 1800k of sketch space.
max_bin_size = 1900544
if "_ESP32_" in env_name or "_ESP32c6_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name:
if "_ESP32_" in env_name or "_ESP32c5_" in env_name or "_ESP32c6_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name:
if "_8M1M" in env_name:
# ESP32 with 3520k of sketch space.
max_bin_size = 3604480
if "_ESP32_" in env_name or "_ESP32c3_" in env_name or "_ESP32c6_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name:
if "_ESP32_" in env_name or "_ESP32c3_" in env_name or "_ESP32c5_" in env_name or "_ESP32c6_" in env_name or "_ESP32s2_" in env_name or "_ESP32s3_" in env_name:
if "_16M8M" in env_name or "_16M2M" in env_name or "_16M1M" in env_name:
# ESP32 with 4096k of sketch space.
max_bin_size = 4194304
@@ -86,8 +86,12 @@ def generate_webflash_json_manifest(variant, file_suffix):
chipFamily = 'ESP32-C2'
elif 'ESP32c3' in variant:
chipFamily = 'ESP32-C3'
elif 'ESP32c5' in variant:
chipFamily = 'ESP32-C5'
elif 'ESP32c6' in variant:
chipFamily = 'ESP32-C6'
elif 'ESP32p4' in variant:
chipFamily = 'ESP32-P4'
elif 'ESP32h2' in variant:
chipFamily = 'ESP32-H2'
else:
tools/pio/generate_web_flasher_manifest.py
+8
View File
@@ -33,10 +33,14 @@ def create_display_text(description, version, families):
esp32_split.append('C2')
if 'ESP32-C3' in families:
esp32_split.append('C3')
if 'ESP32-C5' in families:
esp32_split.append('C5')
if 'ESP32-C6' in families:
esp32_split.append('C6')
if 'ESP32-H2' in families:
esp32_split.append('H2')
if 'ESP32-P4' in families:
esp32_split.append('P4')
if len(esp32_split) > 0:
fam_split.append('ESP32-' + '/'.join(esp32_split))
@@ -74,10 +78,14 @@ def parse_filename(file, version, variant, file_suffix):
chipFamily = 'ESP32-C2'
elif 'ESP32c3' in variant:
chipFamily = 'ESP32-C3'
elif 'ESP32c5' in variant:
chipFamily = 'ESP32-C5'
elif 'ESP32c6' in variant:
chipFamily = 'ESP32-C6'
elif 'ESP32h2' in variant:
chipFamily = 'ESP32-H2'
elif 'ESP32p4' in variant:
chipFamily = 'ESP32-P4'
else:
chipFamily = 'ESP32'