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updated to kicad 6; dual mount smt/tht crystal; added test points for swd

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This commit is contained in:
Nick Silvestro committed 2022-03-11 17:10:45 +11:00
1 parent e63903c9e9
commit aab34c9814
6 files changed
+154039 -97387
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OpenFlops.kicad_pcb
+60157 -9690
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OpenFlops.kicad_prl
+77
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@@ -0,0 +1,77 @@
{
"board": {
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
0,
1,
2,
3,
4,
5,
6,
7,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
32,
33,
34,
35,
36
],
"visible_layers": "00210fc_80000001",
"zone_display_mode": 0
},
"meta": {
"filename": "OpenFlops.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}
OpenFlops.kicad_pro
+478
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@@ -0,0 +1,478 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 2.0,
"height": 2.5,
"width": 2.5
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.254
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.024999999999999998,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.16,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.2,
0.25
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 0.6,
"drill": 0.4
},
{
"diameter": 0.8,
"drill": 0.6
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "OpenFlops.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.6,
"via_drill": 0.4,
"wire_width": 6.0
},
{
"bus_width": 12.0,
"clearance": 0.25,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Power",
"nets": [
"+3V3",
"+5V",
"GND"
],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.75,
"via_diameter": 0.8,
"via_drill": 0.6,
"wire_width": 6.0
},
{
"bus_width": 12.0,
"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "uC",
"nets": [],
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "OpenFlops.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"a7531a95-7ca1-4f34-955e-18120cec99e6",
""
]
],
"text_variables": {}
}
OpenFlops.kicad_sch
+8423
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OpenFlops.pretty/Crystal_HC49-DualType.kicad_mod
+63
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@@ -0,0 +1,63 @@
(footprint "Crystal_HC49-DualType" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 61FA4881)
(descr "SMD Crystal HC-49-SD http://cdn-reichelt.de/documents/datenblatt/B400/xxx-HC49-SMD.pdf, 11.4x4.7mm^2 package")
(tags "SMD SMT crystal")
(attr smd)
(fp_text reference "REF**" (at 0 -3.55) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp a5c104d3-89c9-4abc-a64e-c0025d27215c)
)
(fp_text value "Crystal_HC49-DualType" (at 0 3.55) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp cbdd1bbf-3cd0-4ee4-887c-601a6f0db5ee)
)
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 6a567bea-b4ae-4ae0-8fe6-f1ab689e091c)
)
(fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 7ab7b1db-1ff2-493f-8f9c-36792ad21c73)
)
(fp_line (start -6.7 -2.55) (end -6.7 2.55) (layer "F.SilkS") (width 0.12) (tstamp 149c5d61-baf1-4212-9ad9-405f30b44c95))
(fp_line (start 5.9 -2.55) (end -6.7 -2.55) (layer "F.SilkS") (width 0.12) (tstamp 40346a5c-41cd-4378-9d56-9e921a1e0734))
(fp_line (start -6.7 2.55) (end 5.9 2.55) (layer "F.SilkS") (width 0.12) (tstamp 55439d6c-cdf1-4cc6-9c90-3dbefeda32d9))
(fp_line (start -3.125 -2.525) (end 3.125 -2.525) (layer "F.SilkS") (width 0.12) (tstamp d1747514-84b8-48bd-8139-cb62e6af9645))
(fp_line (start -3.125 2.525) (end 3.125 2.525) (layer "F.SilkS") (width 0.12) (tstamp d69f5b76-89bb-4a28-a3a3-1df6ed8fd235))
(fp_arc (start -3.125 2.525) (mid -5.65 0) (end -3.125 -2.525) (layer "F.SilkS") (width 0.12) (tstamp 46ef7791-0c18-4f00-822c-2403dcd88336))
(fp_arc (start 3.125 -2.525) (mid 5.65 0) (end 3.125 2.525) (layer "F.SilkS") (width 0.12) (tstamp dc293504-8b38-48c4-933a-87973ac3dddb))
(fp_line (start 5.96 -2.8) (end -5.94 -2.8) (layer "F.CrtYd") (width 0.05) (tstamp 0f7bfd96-768d-43a9-8026-375cd6547c7f))
(fp_line (start -6.8 -2.6) (end -6.8 2.6) (layer "F.CrtYd") (width 0.05) (tstamp 113c2e5c-5d21-44b9-9699-61a03d05b219))
(fp_line (start -6.8 2.6) (end 6.8 2.6) (layer "F.CrtYd") (width 0.05) (tstamp 3fab55da-a730-4225-adf1-b91eeeb16267))
(fp_line (start -5.94 -2.8) (end -5.94 2.8) (layer "F.CrtYd") (width 0.05) (tstamp 5c470add-b449-455e-95fc-baae46d35c85))
(fp_line (start 6.8 2.6) (end 6.8 -2.6) (layer "F.CrtYd") (width 0.05) (tstamp 6eb8a12c-f7dd-45db-ac57-5cf35b00d623))
(fp_line (start 6.8 -2.6) (end -6.8 -2.6) (layer "F.CrtYd") (width 0.05) (tstamp 6f893dfa-8241-4004-a564-8340bce225c5))
(fp_line (start 5.96 2.8) (end 5.96 -2.8) (layer "F.CrtYd") (width 0.05) (tstamp a578d721-17ff-4726-b495-f28c5276fca2))
(fp_line (start -5.94 2.8) (end 5.96 2.8) (layer "F.CrtYd") (width 0.05) (tstamp fde28206-88c1-43b9-9334-84fa7b5f5d38))
(fp_line (start -3.125 -2.325) (end 3.125 -2.325) (layer "F.Fab") (width 0.1) (tstamp 3abac4e2-b3ce-4193-858d-ba0c4b81f84b))
(fp_line (start -5.7 2.35) (end 5.7 2.35) (layer "F.Fab") (width 0.1) (tstamp 53dd890e-5aba-493f-87ec-8a34bea86d70))
(fp_line (start 5.7 -2.35) (end -5.7 -2.35) (layer "F.Fab") (width 0.1) (tstamp 8bcfde59-b85c-43bb-9e8e-e5706baedd16))
(fp_line (start -3.015 2.115) (end 3.015 2.115) (layer "F.Fab") (width 0.1) (tstamp 9ddd0afe-6b4f-4d87-8112-c5b7d07ad5bc))
(fp_line (start -3.125 2.325) (end 3.125 2.325) (layer "F.Fab") (width 0.1) (tstamp a1829870-35f9-42a4-85e5-1fc46eb765ad))
(fp_line (start -3 2) (end 3 2) (layer "F.Fab") (width 0.1) (tstamp b777f5ff-edd2-4554-b34a-e941a882d0fd))
(fp_line (start -5.7 -2.35) (end -5.7 2.35) (layer "F.Fab") (width 0.1) (tstamp bf1f6226-2275-4b86-9c1d-d63e3a6430dd))
(fp_line (start 5.7 2.35) (end 5.7 -2.35) (layer "F.Fab") (width 0.1) (tstamp ca4b2a77-5a71-40ab-b178-0276e8dd2714))
(fp_line (start -3 -2) (end 3 -2) (layer "F.Fab") (width 0.1) (tstamp ddbdf308-7274-4126-9ece-b0701f6ccece))
(fp_line (start -3.015 -2.115) (end 3.015 -2.115) (layer "F.Fab") (width 0.1) (tstamp ed045454-339e-41b3-adf7-74925ba99853))
(fp_arc (start 3 -2) (mid 5 0) (end 3 2) (layer "F.Fab") (width 0.1) (tstamp 15f78139-6d94-44b2-bfa9-7b1fafdf24a2))
(fp_arc (start -3.015 2.115) (mid -5.13 0) (end -3.015 -2.115) (layer "F.Fab") (width 0.1) (tstamp 1ee3dc48-8cba-4d55-baee-99d61bca8a95))
(fp_arc (start -3 2) (mid -5 0) (end -3 -2) (layer "F.Fab") (width 0.1) (tstamp 45da367c-fc2c-42ee-903c-c1df37d60691))
(fp_arc (start -3.125 2.325) (mid -5.45 0) (end -3.125 -2.325) (layer "F.Fab") (width 0.1) (tstamp 71ebaa7f-b6f6-4306-8ae2-f18bcc629bcd))
(fp_arc (start 3.125 -2.325) (mid 5.45 0) (end 3.125 2.325) (layer "F.Fab") (width 0.1) (tstamp 7264e754-94bf-45f8-8f07-c4ba0c236301))
(fp_arc (start 3.015 -2.115) (mid 5.13 0) (end 3.015 2.115) (layer "F.Fab") (width 0.1) (tstamp 7b7956cd-1bdf-4509-92c9-b55e8439ae86))
(pad "1" smd rect (at -4.25 0) (size 4.5 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 24a6640c-c25f-456d-8c74-892f609dcf13))
(pad "1" thru_hole circle (at -2.44 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask) (tstamp f8997d81-479e-4edf-9f9c-860c85e4f531))
(pad "2" thru_hole circle (at 2.44 0) (size 1.5 1.5) (drill 0.8) (layers *.Cu *.Mask) (tstamp 7437b41b-d18a-408f-a04e-b9dbafcc6f80))
(pad "2" smd rect (at 4.25 0) (size 4.5 2) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp fd050c79-bed7-4987-a57a-77020a3e1a94))
(model "${KICAD6_3DMODEL_DIR}/Crystal.3dshapes/Crystal_SMD_HC49-SD.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
fp-info-cache
+84841 -87697
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