mirror of
https://github.com/Seeed-Studio/Seeed_Arduino_CAN.git
synced 2026-07-27 19:55:59 +00:00
add 1Mb/s baudrate
This commit is contained in:
reeedstudio
+88
-86
@@ -1,25 +1,24 @@
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/*
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* mcp_can_dfs.h
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* Library for SeeedStudio CANBUS SHIELD
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*
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* Copyright (c) Seeedstudio
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* Spread by SeeedStudio
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* Author : Loovee
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* Create Time: 2012-4-24
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* Change Log :
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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mcp_can_dfs.h
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2012 Copyright (c) Seeed Technology Inc. All right reserved.
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Author:Loovee
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2012-4-24
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-
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1301 USA
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*/
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#ifndef _MCP2515DFS_H_
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#define _MCP2515DFS_H_
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@@ -142,43 +141,41 @@
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#define MCP_RXB1SIDH 0x71
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#define MCP_TX_INT 0x1C /* Enable all transmit interrup */
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/* ts */
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#define MCP_TX01_INT 0x0C /* Enable TXB0 and TXB1 interru */
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/* pts */
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#define MCP_RX_INT 0x03 /* Enable receive interrupts */
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#define MCP_NO_INT 0x00 /* Disable all interrupts */
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#define MCP_TX_INT 0x1C // Enable all transmit interrup ts
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#define MCP_TX01_INT 0x0C // Enable TXB0 and TXB1 interru pts
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#define MCP_RX_INT 0x03 // Enable receive interrupts
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#define MCP_NO_INT 0x00 // Disable all interrupts
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#define MCP_TX01_MASK 0x14
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#define MCP_TX01_MASK 0x14
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#define MCP_TX_MASK 0x54
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/*
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* Define SPI Instruction Set
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*/
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#define MCP_WRITE 0x02
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#define MCP_WRITE 0x02
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#define MCP_READ 0x03
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#define MCP_READ 0x03
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#define MCP_BITMOD 0x05
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#define MCP_BITMOD 0x05
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#define MCP_LOAD_TX0 0x40
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#define MCP_LOAD_TX1 0x42
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#define MCP_LOAD_TX2 0x44
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#define MCP_LOAD_TX0 0x40
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#define MCP_LOAD_TX1 0x42
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#define MCP_LOAD_TX2 0x44
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#define MCP_RTS_TX0 0x81
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#define MCP_RTS_TX1 0x82
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#define MCP_RTS_TX2 0x84
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#define MCP_RTS_ALL 0x87
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#define MCP_RTS_TX0 0x81
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#define MCP_RTS_TX1 0x82
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#define MCP_RTS_TX2 0x84
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#define MCP_RTS_ALL 0x87
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#define MCP_READ_RX0 0x90
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#define MCP_READ_RX1 0x94
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#define MCP_READ_RX0 0x90
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#define MCP_READ_RX1 0x94
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#define MCP_READ_STATUS 0xA0
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#define MCP_READ_STATUS 0xA0
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#define MCP_RX_STATUS 0xB0
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#define MCP_RX_STATUS 0xB0
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#define MCP_RESET 0xC0
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#define MCP_RESET 0xC0
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/*
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@@ -191,15 +188,15 @@
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#define MODE_LISTENONLY 0x60
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#define MODE_CONFIG 0x80
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#define MODE_POWERUP 0xE0
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#define MODE_MASK 0xE0
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#define MODE_MASK 0xE0
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#define ABORT_TX 0x10
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#define MODE_ONESHOT 0x08
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#define CLKOUT_ENABLE 0x04
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#define CLKOUT_DISABLE 0x00
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#define CLKOUT_PS1 0x00
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#define CLKOUT_PS2 0x01
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#define CLKOUT_PS4 0x02
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#define CLKOUT_PS8 0x03
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#define CLKOUT_ENABLE 0x04
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#define CLKOUT_DISABLE 0x00
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#define CLKOUT_PS1 0x00
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#define CLKOUT_PS2 0x01
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#define CLKOUT_PS4 0x02
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#define CLKOUT_PS8 0x03
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/*
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@@ -216,7 +213,7 @@
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* CNF2 Register Values
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*/
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#define BTLMODE 0x80
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#define BTLMODE 0x80
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#define SAMPLE_1X 0x00
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#define SAMPLE_3X 0x40
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@@ -225,76 +222,80 @@
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* CNF3 Register Values
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*/
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#define SOF_ENABLE 0x80
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#define SOF_DISABLE 0x00
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#define WAKFIL_ENABLE 0x40
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#define WAKFIL_DISABLE 0x00
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#define SOF_ENABLE 0x80
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#define SOF_DISABLE 0x00
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#define WAKFIL_ENABLE 0x40
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#define WAKFIL_DISABLE 0x00
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/*
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* CANINTF Register Bits
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*/
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#define MCP_RX0IF 0x01
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#define MCP_RX1IF 0x02
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#define MCP_TX0IF 0x04
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#define MCP_TX1IF 0x08
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#define MCP_TX2IF 0x10
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#define MCP_ERRIF 0x20
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#define MCP_WAKIF 0x40
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#define MCP_MERRF 0x80
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#define MCP_RX0IF 0x01
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#define MCP_RX1IF 0x02
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#define MCP_TX0IF 0x04
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#define MCP_TX1IF 0x08
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#define MCP_TX2IF 0x10
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#define MCP_ERRIF 0x20
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#define MCP_WAKIF 0x40
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#define MCP_MERRF 0x80
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/*
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* speed 16M
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*/
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#define MCP_16MHz_1000kBPS_CFG1 (0x00)
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#define MCP_16MHz_1000kBPS_CFG2 (0xD0)
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#define MCP_16MHz_1000kBPS_CFG3 (0x02)
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#define MCP_16MHz_500kBPS_CFG1 (0x00)
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#define MCP_16MHz_500kBPS_CFG2 (0xb0)
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#define MCP_16MHz_500kBPS_CFG2 (0xF0)
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#define MCP_16MHz_500kBPS_CFG3 (0x06)
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#define MCP_16MHz_250kBPS_CFG1 (0x01)
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#define MCP_16MHz_250kBPS_CFG2 (0xb0)
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#define MCP_16MHz_250kBPS_CFG3 (0x06)
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#define MCP_16MHz_250kBPS_CFG1 (0x41)
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#define MCP_16MHz_250kBPS_CFG2 (0xF1)
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#define MCP_16MHz_250kBPS_CFG3 (0x05)
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#define MCP_16MHz_200kBPS_CFG1 (0x00)
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#define MCP_16MHz_200kBPS_CFG2 (0xba)
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#define MCP_16MHz_200kBPS_CFG1 (0x01)
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#define MCP_16MHz_200kBPS_CFG2 (0xFA)
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#define MCP_16MHz_200kBPS_CFG3 (0x07)
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#define MCP_16MHz_125kBPS_CFG1 (0x01)
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#define MCP_16MHz_125kBPS_CFG2 (0xba)
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#define MCP_16MHz_125kBPS_CFG3 (0x07)
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#define MCP_16MHz_125kBPS_CFG1 (0x03)
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#define MCP_16MHz_125kBPS_CFG2 (0xF0)
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#define MCP_16MHz_125kBPS_CFG3 (0x06)
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#define MCP_16MHz_100kBPS_CFG1 (0x03)
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#define MCP_16MHz_100kBPS_CFG2 (0xba)
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#define MCP_16MHz_100kBPS_CFG2 (0xFA)
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#define MCP_16MHz_100kBPS_CFG3 (0x07)
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#define MCP_16MHz_80kBPS_CFG1 (0x03)
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#define MCP_16MHz_80kBPS_CFG2 (0xbf)
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#define MCP_16MHz_80kBPS_CFG2 (0xFF)
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#define MCP_16MHz_80kBPS_CFG3 (0x07)
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#define MCP_16MHz_50kBPS_CFG1 (0x07)
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#define MCP_16MHz_50kBPS_CFG2 (0xba)
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#define MCP_16MHz_50kBPS_CFG2 (0xFA)
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#define MCP_16MHz_50kBPS_CFG3 (0x07)
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#define MCP_16MHz_40kBPS_CFG1 (0x07)
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#define MCP_16MHz_40kBPS_CFG2 (0xbf)
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#define MCP_16MHz_40kBPS_CFG2 (0xFF)
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#define MCP_16MHz_40kBPS_CFG3 (0x07)
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#define MCP_16MHz_20kBPS_CFG1 (0x0f)
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#define MCP_16MHz_20kBPS_CFG2 (0xbf)
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#define MCP_16MHz_20kBPS_CFG1 (0x0F)
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#define MCP_16MHz_20kBPS_CFG2 (0xFF)
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#define MCP_16MHz_20kBPS_CFG3 (0x07)
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#define MCP_16MHz_10kBPS_CFG1 (0x1f)
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#define MCP_16MHz_10kBPS_CFG2 (0xbf)
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#define MCP_16MHz_10kBPS_CFG1 (0x1F)
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#define MCP_16MHz_10kBPS_CFG2 (0xFF)
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#define MCP_16MHz_10kBPS_CFG3 (0x07)
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#define MCP_16MHz_5kBPS_CFG1 (0x3f)
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#define MCP_16MHz_5kBPS_CFG2 (0xbf)
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#define MCP_16MHz_5kBPS_CFG1 (0x3F)
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#define MCP_16MHz_5kBPS_CFG2 (0xFF)
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#define MCP_16MHz_5kBPS_CFG3 (0x07)
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#define MCPDEBUG (0)
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#define MCPDEBUG_TXBUF (0)
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#define MCPDEBUG (0)
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#define MCPDEBUG_TXBUF (0)
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#define MCP_N_TXBUFFERS (3)
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#define MCP_RXBUF_0 (MCP_RXB0SIDH)
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@@ -338,6 +339,7 @@
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#define CAN_200KBPS 9
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#define CAN_250KBPS 10
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#define CAN_500KBPS 11
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#define CAN_1000KBPS 12
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#define CAN_OK (0)
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#define CAN_FAILINIT (1)
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@@ -354,4 +356,4 @@
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#endif
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/*********************************************************************************************************
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END FILE
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*********************************************************************************************************/
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*********************************************************************************************************/
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