Applied changes to base on latest Seeed version

- Backward compatibility should be OK.
- mcp2515_write_canMsg and mcp2515_read_canMsg does transfer now with
single SPI session by using SPI READ RX BUFFER and LOAD TX BUFFER
- mcp2515_start_transmit uses directly SPI instruction RTS
- removed internal data buffer. Read and write uses directly provided
buffer
- works with 8Mhz clock
- Possible to set SPI. Some boards has 2 SPI.
- Works with NMEA2000 library
- New functions for better interrupt handling
This commit is contained in:
ttlappalainen
2017-09-13 17:25:12 +03:00
parent adaca826a7
commit d0575d1763
3 changed files with 797 additions and 378 deletions
+677 -348
View File
File diff suppressed because it is too large Load Diff
+38 -20
View File
@@ -20,6 +20,7 @@
Adlerweb
Btetz
Hurvajs
ttlappalainen
The MIT License (MIT)
@@ -53,15 +54,14 @@
class MCP_CAN
{
private:
byte ext_flg; // identifier xxxID
// either extended (the 29 LSB) or standard (the 11 LSB)
unsigned long can_id; // can id
byte dta_len; // data length
byte dta[MAX_CHAR_IN_MESSAGE]; // data
byte rtr; // rtr
byte filhit;
byte SPICS;
SPIClass *pSPI;
byte nReservedTx; // Count of tx buffers for reserved send
/*
* mcp2515 driver function
@@ -72,7 +72,7 @@ private:
void mcp2515_reset(void); // reset mcp2515
byte mcp2515_readRegister(const byte address); // read mcp2515's register
void mcp2515_readRegisterS(const byte address,
byte values[],
const byte n);
@@ -82,17 +82,17 @@ private:
void mcp2515_setRegisterS(const byte address, // set mcp2515's registers
const byte values[],
const byte n);
void mcp2515_initCANBuffers(void);
void mcp2515_modifyRegister(const byte address, // set bit of one register
const byte mask,
const byte data);
byte mcp2515_readStatus(void); // read mcp2515's Status
byte mcp2515_setCANCTRL_Mode(const byte newmode); // set mode
byte mcp2515_configRate(const byte canSpeed); // set boadrate
byte mcp2515_init(const byte canSpeed); // mcp2515init
byte mcp2515_configRate(const byte canSpeed, const byte clock); // set baudrate
byte mcp2515_init(const byte canSpeed, const byte clock); // mcp2515init
void mcp2515_write_id( const byte mcp_addr, // write can id
const byte ext,
@@ -102,28 +102,31 @@ private:
byte* ext,
unsigned long* id );
void mcp2515_write_canMsg( const byte buffer_sidh_addr, int rtrBit ); // write can msg
void mcp2515_read_canMsg( const byte buffer_sidh_addr); // read can msg
void mcp2515_write_canMsg( const byte buffer_sidh_addr, unsigned long id, byte ext, byte rtr, byte len, volatile const byte *buf); // read can msg
void mcp2515_read_canMsg( const byte buffer_load_addr, volatile unsigned long *id, volatile byte *ext, volatile byte *rtr, volatile byte *len, volatile byte *buf); // write can msg
void mcp2515_start_transmit(const byte mcp_addr); // start transmit
byte mcp2515_getNextFreeTXBuf(byte *txbuf_n); // get Next free txbuf
byte mcp2515_isTXBufFree(byte *txbuf_n, byte iBuf); // is buffer by index free
/*
* can operator function
*/
byte setMsg(unsigned long id, byte ext, byte len, byte rtr, byte *pData); // set message
byte setMsg(unsigned long id, byte ext, byte len, byte *pData); // set message
byte clearMsg(); // clear all message to zero
byte readMsg(); // read message
byte sendMsg(int rtrBit); // send message
byte sendMsg(unsigned long id, byte ext, byte rtrBit, byte len, const byte *buf, bool wait_sent=true); // send message
public:
MCP_CAN(byte _CS);
byte begin(byte speedset); // init can
MCP_CAN(byte _CS=0);
void init_CS(byte _CS); // define CS after construction before begin()
void setSPI(SPIClass *_pSPI) { pSPI=_pSPI; } // define SPI port to use before begin()
void enableTxInterrupt(bool enable=true); // enable transmit interrupt
void reserveTxBuffers(byte nTxBuf=0) { nReservedTx=(nTxBuf<MCP_N_TXBUFFERS?nTxBuf:MCP_N_TXBUFFERS-1); }
byte getLastTxBuffer() { return MCP_N_TXBUFFERS-1; } // read index of last tx buffer
byte begin(byte speedset, const byte clockset = MCP_16MHz); // init can
byte init_Mask(byte num, byte ext, unsigned long ulData); // init Masks
byte init_Filt(byte num, byte ext, unsigned long ulData); // init filters
byte sendMsgBuf(unsigned long id, byte ext, byte rtr, byte len, byte *buf); // send buf
byte sendMsgBuf(unsigned long id, byte ext, byte len, byte *buf); // send buf
byte sendMsgBuf(unsigned long id, byte ext, byte rtrBit, byte len, const byte *buf, bool wait_sent=true); // send buf
byte sendMsgBuf(unsigned long id, byte ext, byte len, const byte *buf, bool wait_sent=true); // send buf
byte readMsgBuf(byte *len, byte *buf); // read buf
byte readMsgBufID(unsigned long *ID, byte *len, byte *buf); // read buf with object ID
byte checkReceive(void); // if something received
@@ -131,6 +134,21 @@ public:
unsigned long getCanId(void); // get can id when receive
byte isRemoteRequest(void); // get RR flag when receive
byte isExtendedFrame(void); // did we recieve 29bit frame?
byte readMsgBufID(byte status, volatile unsigned long *id, volatile byte *ext, volatile byte *rtr, volatile byte *len, volatile byte *buf); // read buf with object ID
byte trySendMsgBuf(unsigned long id, byte ext, byte rtrBit, byte len, const byte *buf, byte iTxBuf=0xff); // as sendMsgBuf, but does not have any wait for free buffer
byte sendMsgBuf(byte status, unsigned long id, byte ext, byte rtrBit, byte len, volatile const byte *buf); // send message buf by using parsed buffer status
inline byte trySendExtMsgBuf(unsigned long id, byte len, const byte *buf, byte iTxBuf=0xff) { // as trySendMsgBuf, but set ext=1 and rtr=0
return trySendMsgBuf(id,1,0,len,buf,iTxBuf);
}
inline byte sendExtMsgBuf(byte status, unsigned long id, byte len, volatile const byte *buf) { // as sendMsgBuf, but set ext=1 and rtr=0
return sendMsgBuf(status,id,1,0,len,buf);
}
void clearBufferTransmitIfFlags(byte flags=0); // Clear transmit flags according to status
byte readRxTxStatus(void); // read has something send or received
byte checkClearRxStatus(byte *status); // read and clear and return first found rx status bit
byte checkClearTxStatus(byte *status, byte iTxBuf=0xff); // read and clear and return first found or buffer specified tx status bit
};
#endif
+82 -10
View File
@@ -4,9 +4,9 @@
Author:Loovee (loovee@seeed.cc)
2014-1-16
Contributor:
Contributor:
Cory J. Fowler
Latonita
Woodward1
@@ -21,7 +21,8 @@
Btetz
Hurvajs
xboxpro1
ttlappalainen
The MIT License (MIT)
Copyright (c) 2013 Seeed Technology Inc.
@@ -85,10 +86,18 @@
#define MCP_TXB_TXIE_M 0x04
#define MCP_TXB_TXP10_M 0x03
#define MCP_TXB_RTR_M 0x40 // In TXBnDLC
#define MCP_RXB_IDE_M 0x08 // In RXBnSIDL
#define MCP_RXB_RTR_M 0x40 // In RXBnDLC
#define MCP_TXB_RTR_M 0x40 // In TXBnDLC
#define MCP_RXB_IDE_M 0x08 // In RXBnSIDL
#define MCP_RXB_RTR_M 0x40 // In RXBnDLC
#define MCP_STAT_TX_PENDING_MASK (0x54)
#define MCP_STAT_TX0_PENDING (0x04)
#define MCP_STAT_TX1_PENDING (0x10)
#define MCP_STAT_TX2_PENDING (0x40)
#define MCP_STAT_TXIF_MASK (0xA8)
#define MCP_STAT_TX0IF (0x08)
#define MCP_STAT_TX1IF (0x20)
#define MCP_STAT_TX2IF (0x80)
#define MCP_STAT_RXIF_MASK (0x03)
#define MCP_STAT_RX0IF (1<<0)
#define MCP_STAT_RX1IF (1<<1)
@@ -101,7 +110,7 @@
#define MCP_EFLG_TXWAR (1<<2)
#define MCP_EFLG_RXWAR (1<<1)
#define MCP_EFLG_EWARN (1<<0)
#define MCP_EFLG_ERRORMASK (0xF8) // 5 MS-Bits
#define MCP_EFLG_ERRORMASK (0xF8) // 5 MS-Bits
// Define MCP2515 register addresses
@@ -148,12 +157,16 @@
#define MCP_CANINTF 0x2C
#define MCP_EFLG 0x2D
#define MCP_TXB0CTRL 0x30
#define MCP_TXB0SIDH 0x31
#define MCP_TXB1CTRL 0x40
#define MCP_TXB1SIDH 0x41
#define MCP_TXB2CTRL 0x50
#define MCP_TXB2SIDH 0x51
#define MCP_RXB0CTRL 0x60
#define MCP_RXB0SIDH 0x61
#define MCP_RXB1CTRL 0x70
#define MCP_RXB1SIDH 0x71
#define MCP_TX_INT 0x1C // Enable all transmit interrup ts
#define MCP_TX01_INT 0x0C // Enable TXB0 and TXB1 interru pts
#define MCP_RX_INT 0x03 // Enable receive interrupts
@@ -236,6 +249,11 @@
#define MCP_WAKIF 0x40
#define MCP_MERRF 0x80
// clock
#define MCP_16MHz 1
#define MCP_8MHz 2
// speed 16M
#define MCP_16MHz_1000kBPS_CFG1 (0x00)
@@ -311,6 +329,60 @@
#define MCP_16MHz_666kBPS_CFG3 (0x04)
// speed 8M
#define MCP_8MHz_1000kBPS_CFG1 (0x00)
#define MCP_8MHz_1000kBPS_CFG2 (0x80)
#define MCP_8MHz_1000kBPS_CFG3 (0x00)
#define MCP_8MHz_500kBPS_CFG1 (0x00)
#define MCP_8MHz_500kBPS_CFG2 (0x90)
#define MCP_8MHz_500kBPS_CFG3 (0x02)
#define MCP_8MHz_250kBPS_CFG1 (0x00)
#define MCP_8MHz_250kBPS_CFG2 (0xb1)
#define MCP_8MHz_250kBPS_CFG3 (0x05)
#define MCP_8MHz_200kBPS_CFG1 (0x00)
#define MCP_8MHz_200kBPS_CFG2 (0xb4)
#define MCP_8MHz_200kBPS_CFG3 (0x06)
#define MCP_8MHz_125kBPS_CFG1 (0x01)
#define MCP_8MHz_125kBPS_CFG2 (0xb1)
#define MCP_8MHz_125kBPS_CFG3 (0x05)
#define MCP_8MHz_100kBPS_CFG1 (0x01)
#define MCP_8MHz_100kBPS_CFG2 (0xb4)
#define MCP_8MHz_100kBPS_CFG3 (0x06)
#define MCP_8MHz_80kBPS_CFG1 (0x01)
#define MCP_8MHz_80kBPS_CFG2 (0xbf)
#define MCP_8MHz_80kBPS_CFG3 (0x07)
#define MCP_8MHz_50kBPS_CFG1 (0x03)
#define MCP_8MHz_50kBPS_CFG2 (0xb4)
#define MCP_8MHz_50kBPS_CFG3 (0x06)
#define MCP_8MHz_40kBPS_CFG1 (0x03)
#define MCP_8MHz_40kBPS_CFG2 (0xbf)
#define MCP_8MHz_40kBPS_CFG3 (0x07)
#define MCP_8MHz_31k25BPS_CFG1 (0x07)
#define MCP_8MHz_31k25BPS_CFG2 (0xa4)
#define MCP_8MHz_31k25BPS_CFG3 (0x04)
#define MCP_8MHz_20kBPS_CFG1 (0x07)
#define MCP_8MHz_20kBPS_CFG2 (0xbf)
#define MCP_8MHz_20kBPS_CFG3 (0x07)
#define MCP_8MHz_10kBPS_CFG1 (0x0f)
#define MCP_8MHz_10kBPS_CFG2 (0xbf)
#define MCP_8MHz_10kBPS_CFG3 (0x07)
#define MCP_8MHz_5kBPS_CFG1 (0x1f)
#define MCP_8MHz_5kBPS_CFG2 (0xbf)
#define MCP_8MHz_5kBPS_CFG3 (0x07)
#define MCPDEBUG (0)
#define MCPDEBUG_TXBUF (0)
#define MCP_N_TXBUFFERS (3)
@@ -329,7 +401,7 @@
#define CANUSELOOP 0
#define CANSENDTIMEOUT (200) // milliseconds
#define CANSENDTIMEOUT (200) // milliseconds
// initial value of gCANAutoProcess
@@ -345,7 +417,7 @@
#define CAN_5KBPS 1
#define CAN_10KBPS 2
#define CAN_20KBPS 3
#define CAN_25KBPS 4
#define CAN_25KBPS 4
#define CAN_31K25BPS 5
#define CAN_33KBPS 6
#define CAN_40KBPS 7