Correct way of ICACHE_RAM_ATTR usage

lib/default/TasmotaWire/src/core_esp8266_si2c.cpp

@@ -112,7 +112,7 @@ void Twi::init(unsigned char sda, unsigned char scl) {
   twi_setClockStretchLimit(150000L); // default value is 150 mS
 }
 
-void Twi::busywait(unsigned int v) {
+void ICACHE_RAM_ATTR Twi::busywait(unsigned int v) {
   unsigned int i;
   for (i = 0; i < v; i++) {  // loop time is 5 machine cycles: 31.25ns @ 160MHz, 62.5ns @ 80MHz
     asm("nop"); // minimum element to keep GCC from optimizing this function out.

lib/default/TasmotaWire/src/twi_class.h

@@ -12,7 +12,7 @@ private:
     uint32_t twi_clockStretchLimit = 150000;
 
     // Internal use functions
-    void ICACHE_RAM_ATTR busywait(unsigned int v);
+    void busywait(unsigned int v);
     bool write_start(void);
     bool write_stop(void);
     bool write_bit(bool bit);