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Update to circle-stdlib v15.6/Circle Step 43.3
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@@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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## [Unreleased]
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### Changed
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- Update to circle-stdlib v15.6/Circle Step 43.3.
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## [0.8.5] - 2021-02-10
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### Fixed
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@@ -15,11 +15,6 @@ $(CIRCLE_STDLIB_CONFIG) $(CIRCLE_CONFIG)&:
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@echo "Configuring for Raspberry Pi $(RASPBERRYPI) ($(BITS) bit)"
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$(CIRCLESTDLIBHOME)/configure --raspberrypi=$(RASPBERRYPI) --prefix=$(PREFIX)
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# Apply patches
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@patch -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-i2s-slave.patch
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@patch -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-sd-high-speed.patch
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@patch -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-sd-sysconfig.patch
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# Enable multi-core
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echo "DEFINE += -DARM_ALLOW_MULTI_CORE" >> $(CIRCLE_CONFIG)
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@@ -113,9 +108,6 @@ clean:
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#
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veryclean: clean
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# Reverse patches
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-sd-sysconfig.patch
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-sd-high-speed.patch
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(CIRCLEHOME) < patches/circle-43.2-i2s-slave.patch
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(FLUIDSYNTHHOME) < patches/fluidsynth-2.1.7-circle.patch
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(FLUIDSYNTHHOME) < patches/fluidsynth-2.1.7-pan-fix-2.patch
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@patch -R -N -p1 --no-backup-if-mismatch -r - -d $(FLUIDSYNTHHOME) < patches/fluidsynth-2.1.7-pan-fix-1.patch
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Vendored
+1
-1
Submodule external/circle-stdlib updated: fdb3c4a948...44ae08ea8a.
@@ -1,87 +0,0 @@
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From bfbd0e1444c1cf7d3056a1a44fe0cf47bc9c9e3d Mon Sep 17 00:00:00 2001
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From: Dale Whinham <daleyo@gmail.com>
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Date: Wed, 25 Nov 2020 20:07:55 +0000
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Subject: [PATCH] Add option to allow I2S DAC to be master clock
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---
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include/circle/i2ssoundbasedevice.h | 5 ++++-
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lib/i2ssoundbasedevice.cpp | 23 ++++++++++++++++++-----
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2 files changed, 22 insertions(+), 6 deletions(-)
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diff --git a/include/circle/i2ssoundbasedevice.h b/include/circle/i2ssoundbasedevice.h
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index 12366f26..242798ad 100644
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--- a/include/circle/i2ssoundbasedevice.h
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+++ b/include/circle/i2ssoundbasedevice.h
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@@ -45,9 +45,11 @@ class CI2SSoundBaseDevice : public CSoundBaseDevice /// Low level access to the
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/// \param nSampleRate sample rate in Hz
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/// \param nChunkSize twice the number of samples (words) to be handled\n
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/// with one call to GetChunk() (one word per stereo channel)
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+ /// \param bSlave enable slave mode (PCM clock and FS clock are inputs)
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CI2SSoundBaseDevice (CInterruptSystem *pInterrupt,
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unsigned nSampleRate = 192000,
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- unsigned nChunkSize = 8192);
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+ unsigned nChunkSize = 8192,
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+ bool bSlave = FALSE);
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virtual ~CI2SSoundBaseDevice (void);
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@@ -90,6 +92,7 @@ class CI2SSoundBaseDevice : public CSoundBaseDevice /// Low level access to the
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private:
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CInterruptSystem *m_pInterruptSystem;
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unsigned m_nChunkSize;
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+ bool m_bSlave;
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CGPIOPin m_PCMCLKPin;
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CGPIOPin m_PCMFSPin;
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diff --git a/lib/i2ssoundbasedevice.cpp b/lib/i2ssoundbasedevice.cpp
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index 334e0150..3627b708 100644
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--- a/lib/i2ssoundbasedevice.cpp
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+++ b/lib/i2ssoundbasedevice.cpp
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@@ -59,7 +59,9 @@
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#define CS_A_EN (1 << 0)
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#define MODE_A_CLKI (1 << 22)
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+#define MODE_A_CLKM (1 << 23)
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#define MODE_A_FSI (1 << 20)
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+#define MODE_A_FSM (1 << 21)
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#define MODE_A_FLEN__SHIFT 10
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#define MODE_A_FSLEN__SHIFT 0
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@@ -123,10 +125,12 @@
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CI2SSoundBaseDevice::CI2SSoundBaseDevice (CInterruptSystem *pInterrupt,
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unsigned nSampleRate,
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- unsigned nChunkSize)
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+ unsigned nChunkSize,
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+ bool bSlave)
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: CSoundBaseDevice (SoundFormatSigned24, 0, nSampleRate),
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m_pInterruptSystem (pInterrupt),
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m_nChunkSize (nChunkSize),
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+ m_bSlave (bSlave),
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m_PCMCLKPin (18, GPIOModeAlternateFunction0),
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m_PCMFSPin (19, GPIOModeAlternateFunction0),
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m_PCMDOUTPin (21, GPIOModeAlternateFunction0),
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@@ -387,10 +391,19 @@ void CI2SSoundBaseDevice::RunI2S (void)
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| TXC_A_CH2EN
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| ((CHANLEN+1) << TXC_A_CH2POS__SHIFT)
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| (0 << TXC_A_CH2WID__SHIFT));
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- write32 (ARM_PCM_MODE_A, MODE_A_CLKI
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- | MODE_A_FSI
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- | ((CHANS*CHANLEN-1) << MODE_A_FLEN__SHIFT)
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- | (CHANLEN << MODE_A_FSLEN__SHIFT));
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+
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+ u32 nModeA = MODE_A_CLKI
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+ | MODE_A_FSI
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+ | ((CHANS*CHANLEN-1) << MODE_A_FLEN__SHIFT)
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+ | (CHANLEN << MODE_A_FSLEN__SHIFT);
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+
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+ // set PCM clock and frame sync as inputs if in slave mode
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+ if (m_bSlave)
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+ {
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+ nModeA |= MODE_A_CLKM | MODE_A_FSM;
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+ }
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+
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+ write32 (ARM_PCM_MODE_A, nModeA);
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// disable standby
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write32 (ARM_PCM_CS_A, read32 (ARM_PCM_CS_A) | CS_A_STBY);
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@@ -1,111 +0,0 @@
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From ec7a0d0c66caa81e15719a035ddb8e3e931819dd Mon Sep 17 00:00:00 2001
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From: Dale Whinham <daleyo@gmail.com>
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Date: Sun, 27 Dec 2020 17:31:58 +0000
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Subject: [PATCH] addon/SDCard: Enable optional High Speed/SDR25 mode
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---
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addon/SDCard/emmc.cpp | 57 ++++++++++++++++++++++++++++++++++++++++++-
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addon/SDCard/emmc.h | 1 +
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2 files changed, 57 insertions(+), 1 deletion(-)
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diff --git a/addon/SDCard/emmc.cpp b/addon/SDCard/emmc.cpp
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index 7f0d9d1d..298e058f 100644
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--- a/addon/SDCard/emmc.cpp
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+++ b/addon/SDCard/emmc.cpp
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@@ -68,6 +68,9 @@
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// Enable 1.8V support
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//#define SD_1_8V_SUPPORT
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+// Enable High Speed/SDR25 mode
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+//#define SD_HIGH_SPEED
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+
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// Enable 4-bit support
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#define SD_4BIT_DATA
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@@ -277,7 +280,7 @@ const u32 CEMMCDevice::sd_commands[] =
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SD_CMD_INDEX(3) | SD_RESP_R6,
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SD_CMD_INDEX(4),
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SD_CMD_INDEX(5) | SD_RESP_R4,
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- SD_CMD_INDEX(6) | SD_RESP_R1,
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+ SD_CMD_INDEX(6) | SD_RESP_R1 | SD_DATA_READ,
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SD_CMD_INDEX(7) | SD_RESP_R1b,
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SD_CMD_INDEX(8) | SD_RESP_R7,
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SD_CMD_INDEX(9) | SD_RESP_R2,
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@@ -1511,6 +1514,7 @@ int CEMMCDevice::CardReset (void)
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m_device_id[3] = 0;
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m_card_supports_sdhc = 0;
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+ m_card_supports_hs = 0;
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m_card_supports_18v = 0;
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m_card_ocr = 0;
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m_card_rca = 0;
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@@ -1957,6 +1961,57 @@ int CEMMCDevice::CardReset (void)
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LogWrite (LogDebug, "SCR: version %s, bus_widths %01x", sd_versions[m_pSCR->sd_version], m_pSCR->sd_bus_widths);
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#endif
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+#ifdef SD_HIGH_SPEED
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+ // If card supports CMD6, read switch information from card
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+ if (m_pSCR->sd_version >= SD_VER_1_1)
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+ {
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+ // 512 bit response
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+ u8 cmd6_resp[64];
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+ m_buf = &cmd6_resp[0];
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+ m_block_size = 64;
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+
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+ // CMD6 Mode 0: Check Function (Group 1, Access Mode)
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+ if (!IssueCommand (SWITCH_FUNC, 0x00fffff0, 100000))
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+ {
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+ LogWrite (LogError, "Error sending SWITCH_FUNC (Mode 0)");
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+ }
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+ else
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+ {
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+ // Check Group 1, Function 1 (High Speed/SDR25)
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+ m_card_supports_hs = (cmd6_resp[13] >> 1) & 0x1;
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+
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+ // Attempt switch if supported
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+ if (m_card_supports_hs)
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+ {
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+#ifdef EMMC_DEBUG2
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+ LogWrite (LogDebug, "Switching to %s mode", m_card_supports_18v ? "SDR25" : "High Speed");
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+#endif
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+
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+ // CMD6 Mode 1: Set Function (Group 1, Access Mode = High Speed/SDR25)
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+ if (!IssueCommand (SWITCH_FUNC, 0x80fffff1, 100000))
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+ {
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+ LogWrite (LogError, "Switch to %s mode failed", m_card_supports_18v ? "SDR25" : "High Speed");
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+ }
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+ else
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+ {
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+ // Success; switch clock to 50MHz
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+#ifndef USE_SDHOST
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+ SwitchClockRate (base_clock, SD_CLOCK_HIGH);
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+#else
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+ m_Host.SetClock (SD_CLOCK_HIGH);
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+#endif
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+#ifdef EMMC_DEBUG2
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+ LogWrite (LogDebug, "Switch to 50MHz clock complete");
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+#endif
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+ }
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+ }
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+ }
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+
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+ // Restore block size
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+ m_block_size = SD_BLOCK_SIZE;
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+ }
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+#endif
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+
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if (m_pSCR->sd_bus_widths & 4)
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{
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// Set 4-bit transfer mode (ACMD6)
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diff --git a/addon/SDCard/emmc.h b/addon/SDCard/emmc.h
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index 0ced0045..6411aa59 100644
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--- a/addon/SDCard/emmc.h
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+++ b/addon/SDCard/emmc.h
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@@ -128,6 +128,7 @@ class CEMMCDevice : public CDevice
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u32 m_device_id[4];
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u32 m_card_supports_sdhc;
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+ u32 m_card_supports_hs;
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u32 m_card_supports_18v;
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u32 m_card_ocr;
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u32 m_card_rca;
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@@ -1,29 +0,0 @@
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From 7878a53b26a7df22b321a687a14f1adbcf75dcb1 Mon Sep 17 00:00:00 2001
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From: Rene Stange <rsta2@o2online.de>
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Date: Mon, 28 Dec 2020 20:55:58 +0100
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Subject: [PATCH] sysconfig: Add SD_HIGH_SPEED
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---
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include/circle/sysconfig.h | 9 +++++++++
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1 file changed, 9 insertions(+)
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diff --git a/include/circle/sysconfig.h b/include/circle/sysconfig.h
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index 0a410cd1..fbe92b4a 100644
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--- a/include/circle/sysconfig.h
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+++ b/include/circle/sysconfig.h
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@@ -299,6 +299,15 @@
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#endif
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+// SD_HIGH_SPEED enables the high-speed extensions of the SD card
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+// driver, which should result in a better performance with modern SD
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+// cards. This is not tested that widely like the standard driver, why
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+// it is presented as an option here, but is enabled by default.
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+
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+#ifndef NO_SD_HIGH_SPEED
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+#define SD_HIGH_SPEED
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+#endif
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+
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// SAVE_VFP_REGS_ON_IRQ enables saving the floating point registers
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// on entry when an IRQ occurs and will restore these registers on exit
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// from the IRQ handler. This has to be defined, if an IRQ handler
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