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Give a bit more time for vreg to settle

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Ian Scott committed 2025-09-26 07:21:29 -06:00
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commit 66dfb425e8
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sw/CMakeLists.txt
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@@ -68,6 +68,7 @@ add_compile_definitions(
# Set voltage before main so no need to do so on the fly
SYS_CLK_VREG_VOLTAGE_AUTO_ADJUST=1
SYS_CLK_VREG_VOLTAGE_MIN=VREG_VOLTAGE_1_25
SYS_CLK_VREG_VOLTAGE_AUTO_ADJUST_DELAY_US=10000
PICO_DEFAULT_UART=0
PICO_DEFAULT_UART_TX_PIN=28
PICO_DEFAULT_UART_RX_PIN=-1