mirror of
https://github.com/polpo/picogus.git
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HW v1.1.1 - sync BOM, iBOM, schematic, PCB, and gerbers
This commit is contained in:
1 parent
eeb23f1d71
commit
9b614c72f8
14 files changed
+70507
-75273
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+25186
-28709
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+93
-14
@@ -1,5 +1,6 @@
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{
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"board": {
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"3dviewports": [],
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.049999999999999996,
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@@ -63,20 +64,26 @@
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"connection_width": "warning",
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"copper_edge_clearance": "error",
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"copper_sliver": "warning",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint": "error",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"isolated_copper": "warning",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"lib_footprint_issues": "warning",
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"lib_footprint_mismatch": "warning",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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@@ -86,9 +93,14 @@
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_edge_clearance": "warning",
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"silk_over_copper": "ignore",
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"silk_overlap": "ignore",
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"skew_out_of_range": "error",
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"solder_mask_bridge": "error",
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"starved_thermal": "error",
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"text_height": "warning",
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"text_thickness": "warning",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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@@ -97,7 +109,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rule_severitieslegacy_courtyards_overlap": true,
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@@ -107,18 +118,63 @@
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.19999999999999998,
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"min_connection": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.254,
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"min_hole_to_hole": 0.5,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_resolved_spokes": 2,
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"min_silk_clearance": 0.0,
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"min_text_height": 0.7999999999999999,
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"min_text_thickness": 0.08,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.13,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_to_copper_clearance": 0.0,
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"use_height_for_length_calcs": true
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},
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"teardrop_options": [
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{
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"td_allow_use_two_tracks": true,
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"td_curve_segcount": 5,
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"td_on_pad_in_zone": false,
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"td_onpadsmd": true,
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"td_onroundshapesonly": false,
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"td_ontrackend": false,
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"td_onviapad": true
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}
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],
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"teardrop_parameters": [
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_round_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_rect_shape",
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"td_width_to_size_filter_ratio": 0.9
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},
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{
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"td_curve_segcount": 0,
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"td_height_ratio": 1.0,
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"td_length_ratio": 0.5,
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"td_maxheight": 2.0,
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"td_maxlen": 1.0,
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"td_target_name": "td_track_end",
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [
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0.0,
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0.2,
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@@ -137,7 +193,8 @@
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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"layer_presets": [],
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"viewports": []
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},
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"boards": [],
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"cvpcb": {
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@@ -321,18 +378,23 @@
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"rule_severities": {
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"bus_definition_conflict": "error",
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"bus_entry_needed": "error",
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"bus_label_syntax": "error",
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"bus_to_bus_conflict": "error",
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"bus_to_net_conflict": "error",
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"conflicting_netclasses": "error",
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"different_unit_footprint": "error",
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"different_unit_net": "error",
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"duplicate_reference": "error",
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"duplicate_sheet_names": "error",
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"endpoint_off_grid": "warning",
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"extra_units": "error",
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"global_label_dangling": "warning",
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"hier_label_mismatch": "error",
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"label_dangling": "error",
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"lib_symbol_issues": "warning",
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"missing_bidi_pin": "warning",
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"missing_input_pin": "warning",
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"missing_power_pin": "error",
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"missing_unit": "warning",
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"multiple_net_names": "warning",
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"net_not_bus_member": "warning",
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"no_connect_connected": "warning",
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@@ -342,6 +404,7 @@
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"pin_to_pin": "warning",
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"power_pin_not_driven": "error",
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"similar_labels": "warning",
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"simulation_model_issue": "ignore",
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"unannotated": "error",
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"unit_value_mismatch": "error",
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"unresolved_variable": "error",
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@@ -359,7 +422,7 @@
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.1,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@@ -373,10 +436,10 @@
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"track_width": 0.25,
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"via_diameter": 0.65,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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},
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{
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"bus_width": 12.0,
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"bus_width": 12,
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"clearance": 0.1,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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@@ -385,23 +448,33 @@
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "pwr",
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"nets": [
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"+3V3",
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"+5V",
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"GND"
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],
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.4,
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"via_diameter": 0.65,
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"via_drill": 0.3,
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"wire_width": 6.0
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"wire_width": 6
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}
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],
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"meta": {
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"version": 2
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"version": 3
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},
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"net_colors": null
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"net_colors": null,
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"netclass_assignments": null,
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"netclass_patterns": [
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{
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"netclass": "pwr",
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"pattern": "+3V3"
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},
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{
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"netclass": "pwr",
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"pattern": "+5V"
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},
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{
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"netclass": "pwr",
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"pattern": "GND"
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}
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]
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},
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"pcbnew": {
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"last_paths": {
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@@ -417,6 +490,8 @@
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"schematic": {
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"annotate_start_num": 0,
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"drawing": {
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"dashed_lines_dash_length_ratio": 12.0,
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"dashed_lines_gap_length_ratio": 3.0,
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"default_line_thickness": 6.0,
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"default_text_size": 25.0,
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"field_names": [],
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@@ -448,7 +523,11 @@
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"spice_current_sheet_as_root": false,
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"spice_external_command": "spice \"%I\"",
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"spice_model_current_sheet_as_root": true,
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"spice_save_all_currents": false,
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"spice_save_all_voltages": false,
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"subpart_first_id": 65,
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"subpart_id_separator": 0
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},
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+1966
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@@ -1,12 +1,12 @@
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%MOMM*%
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%LPD*%
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%MOMM*%
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%LPD*%
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%MOMM*%
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M48
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M48
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