added missing 95kbps and 33kBps for 8MHz chips

This commit is contained in:
Anton Viktorov
2017-03-31 13:17:06 +03:00
parent a92e58d5f0
commit 60fc450772
2 changed files with 20 additions and 0 deletions
+12
View File
@@ -296,6 +296,12 @@ INT8U MCP_CAN::mcp2515_configRate(const INT8U canSpeed, const INT8U clock)
cfg3 = MCP_8MHz_31k25BPS_CFG3;
break;
case (CAN_33KBPS):
cfg1 = MCP_8MHz_33kBPS_CFG1;
cfg2 = MCP_8MHz_33kBPS_CFG2;
cfg3 = MCP_8MHz_33kBPS_CFG3;
break;
case (CAN_40KBPS) :
cfg1 = MCP_8MHz_40kBPS_CFG1;
cfg2 = MCP_8MHz_40kBPS_CFG2;
@@ -320,6 +326,12 @@ INT8U MCP_CAN::mcp2515_configRate(const INT8U canSpeed, const INT8U clock)
cfg3 = MCP_8MHz_83k3BPS_CFG3;
break;
case (CAN_95KBPS):
cfg1 = MCP_8MHz_95kBPS_CFG1;
cfg2 = MCP_8MHz_95kBPS_CFG2;
cfg3 = MCP_8MHz_95kBPS_CFG3;
break;
case (CAN_100KBPS) : /* 100KBPS */
cfg1 = MCP_8MHz_100kBPS_CFG1;
cfg2 = MCP_8MHz_100kBPS_CFG2;
+8
View File
@@ -350,6 +350,10 @@
#define MCP_8MHz_100kBPS_CFG2 (0xb4)
#define MCP_8MHz_100kBPS_CFG3 (0x06)
#define MCP_8MHz_95kBPS_CFG1 (0x01)
#define MCP_8MHz_95kBPS_CFG2 (0xAD)
#define MCP_8MHz_95kBPS_CFG3 (0x07)
#define MCP_8MHz_83k3BPS_CFG1 (0x01)
#define MCP_8MHz_83k3BPS_CFG2 (0xbe)
#define MCP_8MHz_83k3BPS_CFG3 (0x07)
@@ -366,6 +370,10 @@
#define MCP_8MHz_40kBPS_CFG2 (0xbf)
#define MCP_8MHz_40kBPS_CFG3 (0x07)
#define MCP_8MHz_33kBPS_CFG1 (0x04)
#define MCP_8MHz_33kBPS_CFG2 (0xBE)
#define MCP_8MHz_33kBPS_CFG3 (0x07)
#define MCP_8MHz_31k25BPS_CFG1 (0x07)
#define MCP_8MHz_31k25BPS_CFG2 (0xa4)
#define MCP_8MHz_31k25BPS_CFG3 (0x04)